[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20250320173237.GF892515@horms.kernel.org>
Date: Thu, 20 Mar 2025 17:32:37 +0000
From: Simon Horman <horms@...nel.org>
To: Christian Marangi <ansuelsmth@...il.com>
Cc: Lee Jones <lee@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Vladimir Oltean <olteanv@...il.com>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
Maxime Chevallier <maxime.chevallier@...tlin.com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org,
upstream@...oha.com
Subject: Re: [net-next PATCH v12 03/13] dt-bindings: net: dsa: Document
support for Airoha AN8855 DSA Switch
On Sun, Mar 09, 2025 at 06:26:48PM +0100, Christian Marangi wrote:
> Document support for Airoha AN8855 5-port Gigabit Switch.
>
> It does expose the 5 Internal PHYs on the MDIO bus and each port
> can access the Switch register space by configurting the PHY page.
nit: configuring
>
> Each internal PHY might require calibration with the fused EFUSE on
> the switch exposed by the Airoha AN8855 SoC NVMEM.
>
> Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
> ---
> .../net/dsa/airoha,an8855-switch.yaml | 105 ++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 106 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml b/Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml
> new file mode 100644
> index 000000000000..63bcbebd6a29
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/dsa/airoha,an8855-switch.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Airoha AN8855 Gigabit Switch
> +
> +maintainers:
> + - Christian Marangi <ansuelsmth@...il.com>
> +
> +description: >
> + Airoha AN8855 is a 5-port Gigabit Switch.
> +
> + It does expose the 5 Internal PHYs on the MDIO bus and each port
> + can access the Switch register space by configurting the PHY page.
Ditto.
> +
> + Each internal PHY might require calibration with the fused EFUSE on
> + the switch exposed by the Airoha AN8855 SoC NVMEM.
...
Powered by blists - more mailing lists