linux-kernel - Re: [PATCH v8 10/10] drm/amdgpu: update trace format to match gpu_scheduler

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Message-ID: <d0f8d5a9-4ee9-4f65-bb09-c88d814f2acb@amd.com>
Date: Thu, 20 Mar 2025 11:09:15 +0100
From: Christian König <christian.koenig@....com>
To: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@....com>,
 Alex Deucher <alexander.deucher@....com>, David Airlie <airlied@...il.com>,
 Simona Vetter <simona@...ll.ch>
Cc: amd-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v8 10/10] drm/amdgpu: update trace format to match
 gpu_scheduler_trace

Am 20.03.25 um 10:58 schrieb Pierre-Eric Pelloux-Prayer:
> Log fences using the same format for coherency.
>
> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@....com>

Oh, good catch! It's like a decade or so that we switched to 64bit sequence numbers :)

Reviewed-by: Christian König <christian.koenig@....com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 22 ++++++++++------------
>  1 file changed, 10 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
> index a4f394d827bc..d302c68c1258 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
> @@ -168,8 +168,8 @@ TRACE_EVENT(amdgpu_cs_ioctl,
>  	    TP_ARGS(job),
>  	    TP_STRUCT__entry(
>  			     __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
> -			     __field(unsigned int, context)
> -			     __field(unsigned int, seqno)
> +			     __field(u64, context)
> +			     __field(u64, seqno)
>  			     __field(struct dma_fence *, fence)
>  			     __string(ring, to_amdgpu_ring(job->base.sched)->name)
>  			     __field(u32, num_ibs)
> @@ -182,7 +182,7 @@ TRACE_EVENT(amdgpu_cs_ioctl,
>  			   __assign_str(ring);
>  			   __entry->num_ibs = job->num_ibs;
>  			   ),
> -	    TP_printk("timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
> +	    TP_printk("timeline=%s, fence=%llu:%llu, ring_name=%s, num_ibs=%u",
>  		      __get_str(timeline), __entry->context,
>  		      __entry->seqno, __get_str(ring), __entry->num_ibs)
>  );
> @@ -192,8 +192,8 @@ TRACE_EVENT(amdgpu_sched_run_job,
>  	    TP_ARGS(job),
>  	    TP_STRUCT__entry(
>  			     __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
> -			     __field(unsigned int, context)
> -			     __field(unsigned int, seqno)
> +			     __field(u64, context)
> +			     __field(u64, seqno)
>  			     __string(ring, to_amdgpu_ring(job->base.sched)->name)
>  			     __field(u32, num_ibs)
>  			     ),
> @@ -205,7 +205,7 @@ TRACE_EVENT(amdgpu_sched_run_job,
>  			   __assign_str(ring);
>  			   __entry->num_ibs = job->num_ibs;
>  			   ),
> -	    TP_printk("timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
> +	    TP_printk("timeline=%s, fence=%llu:%llu, ring_name=%s, num_ibs=%u",
>  		      __get_str(timeline), __entry->context,
>  		      __entry->seqno, __get_str(ring), __entry->num_ibs)
>  );
> @@ -516,8 +516,8 @@ TRACE_EVENT(amdgpu_ib_pipe_sync,
>  	    TP_STRUCT__entry(
>  			     __string(ring, sched_job->base.sched->name)
>  			     __field(struct dma_fence *, fence)
> -			     __field(uint64_t, ctx)
> -			     __field(unsigned, seqno)
> +			     __field(u64, ctx)
> +			     __field(u64, seqno)
>  			     ),
>  
>  	    TP_fast_assign(
> @@ -526,10 +526,8 @@ TRACE_EVENT(amdgpu_ib_pipe_sync,
>  			   __entry->ctx = fence->context;
>  			   __entry->seqno = fence->seqno;
>  			   ),
> -	    TP_printk("job ring=%s need pipe sync to fence=%p, context=%llu, seq=%u",
> -		      __get_str(ring),
> -		      __entry->fence, __entry->ctx,
> -		      __entry->seqno)
> +	    TP_printk("job ring=%s need pipe sync to fence=%llu:%llu",
> +		      __get_str(ring), __entry->ctx, __entry->seqno)
>  );
>  
>  TRACE_EVENT(amdgpu_reset_reg_dumps,