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Message-ID: <20250320111741.1937892-9-karunika.choo@arm.com>
Date: Thu, 20 Mar 2025 11:17:40 +0000
From: Karunika Choo <karunika.choo@....com>
To: dri-devel@...ts.freedesktop.org
Cc: nd@....com,
Boris Brezillon <boris.brezillon@...labora.com>,
Steven Price <steven.price@....com>,
Liviu Dudau <liviu.dudau@....com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 8/9] drm/panthor: Add support for Mali-G720 and Mali-G725 GPUs
Mali-G720 and Mali-G725 deprecates the use of FLUSH_MEM and FLUSH_PT
MMU_AS commands in favour of cache maintenance via
GPU_COMMAND's FLUSH_CACHES and FLUSH_PA_RANGE.
They also introduce the following registers:
- GPU_COMMAND_ARG0~1
- SHADER_PWRFEATURES
- AMBA_FEATURES
- AMBA_ENABLE
This patch enables FLUSH_CACHES for both families of GPUs via the
PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH bit until FLUSH_PA_RANGE support
is added. It also adds the aforementioned register definitions and
firmware binary support for arch 12.8 and 13.8.
Signed-off-by: Karunika Choo <karunika.choo@....com>
---
drivers/gpu/drm/panthor/panthor_fw.c | 2 ++
drivers/gpu/drm/panthor/panthor_hw.c | 38 ++++++++++++++++++++++++++
drivers/gpu/drm/panthor/panthor_regs.h | 13 +++++++++
3 files changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
index 0b3fab95f26b..8a967af0e2b4 100644
--- a/drivers/gpu/drm/panthor/panthor_fw.c
+++ b/drivers/gpu/drm/panthor/panthor_fw.c
@@ -1399,3 +1399,5 @@ int panthor_fw_init(struct panthor_device *ptdev)
MODULE_FIRMWARE("arm/mali/arch10.8/mali_csffw.bin");
MODULE_FIRMWARE("arm/mali/arch11.8/mali_csffw.bin");
+MODULE_FIRMWARE("arm/mali/arch12.8/mali_csffw.bin");
+MODULE_FIRMWARE("arm/mali/arch13.8/mali_csffw.bin");
diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
index d04c8723ac98..e6354304bbef 100644
--- a/drivers/gpu/drm/panthor/panthor_hw.c
+++ b/drivers/gpu/drm/panthor/panthor_hw.c
@@ -60,6 +60,24 @@ static char *get_gpu_model_name(struct panthor_device *ptdev)
fallthrough;
case GPU_PROD_ID_MAKE(11, 3):
return "Mali-G615";
+ case GPU_PROD_ID_MAKE(12, 0):
+ if (shader_core_count >= 10 && ray_intersection)
+ return "Mali-G720-Immortalis";
+ else if (shader_core_count >= 6)
+ return "Mali-G720";
+
+ fallthrough;
+ case GPU_PROD_ID_MAKE(12, 1):
+ return "Mali-G620";
+ case GPU_PROD_ID_MAKE(13, 0):
+ if (shader_core_count >= 10 && ray_intersection)
+ return "Mali-G925-Immortalis";
+ else if (shader_core_count >= 6)
+ return "Mali-G725";
+
+ fallthrough;
+ case GPU_PROD_ID_MAKE(13, 1):
+ return "Mali-G625";
}
return "(Unknown Mali GPU)";
@@ -110,6 +128,26 @@ static struct panthor_hw panthor_hw_devices[] = {
.gpu_info_init = arch_11_8_gpu_info_init,
}
},
+ {
+ .arch_id = GPU_ARCH_ID_MAKE(12, 8, 0),
+ .arch_mask = GPU_ARCH_ID_MAKE(0xFF, 0xFF, 0),
+ .features = {
+ BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
+ },
+ .ops = {
+ .gpu_info_init = arch_11_8_gpu_info_init,
+ }
+ },
+ {
+ .arch_id = GPU_ARCH_ID_MAKE(13, 8, 0),
+ .arch_mask = GPU_ARCH_ID_MAKE(0xFF, 0xFF, 0),
+ .features = {
+ BIT(PANTHOR_HW_FEATURE_GPU_CTRL_CACHE_FLUSH)
+ },
+ .ops = {
+ .gpu_info_init = arch_11_8_gpu_info_init,
+ }
+ },
};
static int init_gpu_id(struct panthor_device *ptdev)
diff --git a/drivers/gpu/drm/panthor/panthor_regs.h b/drivers/gpu/drm/panthor/panthor_regs.h
index 7bc2d838e704..283e758ac86f 100644
--- a/drivers/gpu/drm/panthor/panthor_regs.h
+++ b/drivers/gpu/drm/panthor/panthor_regs.h
@@ -95,6 +95,9 @@
#define GPU_DOORBELL_FEATURES 0xC0
+#define GPU_COMMAND_ARG_LO(n) (0xD0 + ((n) * 8))
+#define GPU_COMMAND_ARG_HI(n) (0xD4 + ((n) * 8))
+
#define GPU_SHADER_PRESENT_LO 0x100
#define GPU_SHADER_PRESENT_HI 0x104
#define GPU_TILER_PRESENT_LO 0x110
@@ -111,6 +114,8 @@
#define SHADER_PWRON_LO 0x180
#define SHADER_PWRON_HI 0x184
+#define SHADER_PWRFEATURES 0x188
+#define SHADER_PWRFEATURES_RAY_TRACING_UNIT BIT(0)
#define TILER_PWRON_LO 0x190
#define TILER_PWRON_HI 0x194
#define L2_PWRON_LO 0x1A0
@@ -149,6 +154,13 @@
#define GPU_COHERENCY_ACE_LITE 1
#define GPU_COHERENCY_NONE 31
+#define AMBA_FEATURES 0x300
+#define AMBA_FEATURES_ACE_LITE BIT(0)
+#define AMBA_FEATURES_ACE BIT(1)
+#define AMBA_FEATURES_SHAREABLE_CACHE_SUPPORT BIT(5)
+
+#define AMBA_ENABLE 0x304
+
#define GPU_SYSC_PBHA_OVERRIDE(n) (0x320 + ((n) * 4))
#define GPU_SYSC_ALLOC(n) (0x340 + ((n) * 4))
@@ -162,6 +174,7 @@
#define MCU_STATUS_ENABLED 1
#define MCU_STATUS_HALT 2
#define MCU_STATUS_FATAL 3
+#define MCU_FEATURES 0x708
/* Job Control regs */
#define JOB_INT_RAWSTAT 0x1000
--
2.47.1
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