linux-kernel - Re: [PATCH v3 4/7] x86/resctrl: Implement "io

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Message-ID: <f1a67245-4c29-4b31-9e29-58d6b3b2676f@intel.com>
Date: Fri, 21 Mar 2025 15:53:46 -0700
From: Reinette Chatre <reinette.chatre@...el.com>
To: Babu Moger <babu.moger@....com>, <tglx@...utronix.de>, <mingo@...hat.com>,
	<bp@...en8.de>, <dave.hansen@...ux.intel.com>
CC: <x86@...nel.org>, <hpa@...or.com>, <akpm@...ux-foundation.org>,
	<paulmck@...nel.org>, <thuth@...hat.com>, <rostedt@...dmis.org>,
	<xiongwei.song@...driver.com>, <pawan.kumar.gupta@...ux.intel.com>,
	<jpoimboe@...nel.org>, <daniel.sneddon@...ux.intel.com>,
	<thomas.lendacky@....com>, <perry.yuan@....com>, <sandipan.das@....com>,
	<kai.huang@...el.com>, <seanjc@...gle.com>, <xin3.li@...el.com>,
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	<james.morse@....com>, <tony.luck@...el.com>, <peternewman@...gle.com>,
	<linux-doc@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<eranian@...gle.com>, <corbet@....net>
Subject: Re: [PATCH v3 4/7] x86/resctrl: Implement "io_alloc" enable/disable
 handlers

Hi Babu,

On 1/30/25 1:20 PM, Babu Moger wrote:
> "io_alloc" feature that enables direct insertion of data from I/O devices
> into the L3 cache.

Above is not clear to me. Should this maybe be ""io_alloc" enables direct insertion ..."


> 
> On AMD, 'io_alloc" feature is backed by L3 Smart Data Cache Injection

(mismatch quotes around io_alloc ... also below)

> Allocation Enforcement (SDCIAE). SDCIAE feature can be enabled by setting

"can be enabled" -> "is enabled"?

> bit 1 in MSR L3_QOS_EXT_CFG. Apply the updated SDCIAE value across all
> logical processors within the QOS domain when modifying its state.

... it could also just be "Change SDCIAE state by setting (to enable) or
clearing (to disable) bit 1 of MSR L3_QOS_EXT_CFG on all logical processors
within the cache domain."

> 
> Introduce architecture-specific handlers to manage the detection and

This patch only seem to do the enable/disable with detection done in
earlier patch.

> enabling/disabling of 'io_alloc" feature.
> 
> The SDCIAE feature details are available in APM listed below [1].
> [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming
> Publication # 24593 Revision 3.41 section 19.4.7 L3 Smart Data Cache
> Injection Allocation Enforcement (SDCIAE)
> 
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
> Signed-off-by: Babu Moger <babu.moger@....com>
> ---

...

> diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
> index dbe6461f3fbc..e77c3b37bad4 100644
> --- a/include/linux/resctrl.h
> +++ b/include/linux/resctrl.h
> @@ -343,6 +343,15 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_mon_domain *d,
>   */
>  void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_mon_domain *d);
>  
> +/**
> + * resctrl_arch_io_alloc_enable() - Enable/disable io_alloc feature.
> + * @r:		The resctrl resource.
> + * @enable:	Enable (1) or disable (0) the feature

Please be consistent in using periods at end of sentence. 
This could be made more specific with:

	"Enable (true) or disable (false) io_alloc on resource @r."

> + *
> + * This can be called from any CPU.
> + */
> +int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable);
> +
>  extern unsigned int resctrl_rmid_realloc_threshold;
>  extern unsigned int resctrl_rmid_realloc_limit;
>  

Reinette