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Message-ID: <e085027f-2ec9-439a-be07-66f2cad1baaf@quicinc.com>
Date: Mon, 24 Mar 2025 15:16:12 +0800
From: Stone Zhang <quic_stonez@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
CC: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <quic_miaoqing@...cinc.com>, <quic_zhichen@...cinc.com>,
        <quic_yuzha@...cinc.com>
Subject: Re: [PATCH v3 2/2] arm64: dts: qcom: qcs8300-ride: enable WLAN on
 qcs8300-ride



On 3/19/2025 6:13 PM, Dmitry Baryshkov wrote:
> On Tue, Mar 18, 2025 at 05:33:50PM +0800, Stone Zhang wrote:
>> Enable WLAN on qcs8300-ride by adding a node for the PMU module
>> of the WCN6855 and assigning its LDO power outputs to the existing
>> WiFi module.
>>
>> Signed-off-by: Stone Zhang <quic_stonez@...cinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 108 ++++++++++++++++++++++
>>   1 file changed, 108 insertions(+)
>>
>> @@ -320,6 +402,25 @@ &pcie1_phy {
>>   	status = "okay";
>>   };
>>   
>> +&pcieport0 {
>> +	wifi@0 {
>> +		compatible = "pci17cb,1103";
>> +		reg = <0x10000 0x0 0x0 0x0 0x0>;
>> +
>> +		qcom,ath11k-calibration-variant = "QC_QCS8300_Ride";
> 
> Almost missed it. What is your baseline? Krzysztof has sent his
> qcom,calibration-variant patches [1] in February. Bjorn has picked them
> up on March 4th.
> 
> This needs to be rebased on top of [1].
Understood.
> 
> [1] https://lore.kernel.org/linux-arm-msm/20250225-dts-qcom-wifi-calibration-v1-0-347e9c72dcfc@linaro.org/
> 
>> +
>> +		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
>> +		vddaon-supply = <&vreg_pmu_aon_0p59>;
>> +		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
>> +		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
>> +		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
>> +		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
>> +		vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
>> +		vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
>> +		vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
>> +	};
>> +};
>> +
>>   &qupv3_id_0 {
>>   	status = "okay";
>>   };


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