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Message-ID: <08d775ee699ed258c6a7c0ae3ad3ba5f30037310.camel@mediatek.com>
Date: Mon, 24 Mar 2025 09:09:10 +0000
From: Cathy Xu (许华婷) <ot_cathy.xu@...iatek.com>
To: "krzk@...nel.org" <krzk@...nel.org>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Lei Xue (薛磊) <Lei.Xue@...iatek.com>,
"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Wenbin Mei (梅文彬) <Wenbin.Mei@...iatek.com>,
"linus.walleij@...aro.org" <linus.walleij@...aro.org>,
Guodong Liu (刘国栋) <Guodong.Liu@...iatek.com>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
Yong Mao (毛勇) <yong.mao@...iatek.com>,
"conor+dt@...nel.org" <conor+dt@...nel.org>,
Jimin Wang (汪济民) <Jimin.Wang@...iatek.com>,
"robh@...nel.org" <robh@...nel.org>, "sean.wang@...nel.org"
<sean.wang@...nel.org>, "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "matthias.bgg@...il.com"
<matthias.bgg@...il.com>, "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Axe Yang (杨磊) <Axe.Yang@...iatek.com>
Subject: Re: [PATCH v5 1/3] dt-bindings: pinctrl: mediatek: Add support for
mt8196
On Mon, 2025-03-24 at 09:03 +0100, Krzysztof Kozlowski wrote:
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>
>
> On Fri, Mar 21, 2025 at 04:39:12PM +0800, Cathy Xu wrote:
> > + reg:
> > + items:
> > + - description: gpio registers base address
> > + - description: rt group io configuration registers base
> > address
>
> s/io configuration registers base address/IO/
> ?
>
> Why repeating so much of redundant information?
Thank you for your review.
All these registers related to different gpio configutations. Should
I delete them?
>
> > + - description: rm1 group io configuration registers base
> > address
> > + - description: rm2 group io configuration registers base
> > address
> > + - description: rb group io configuration registers base
> > address
> > + - description: bm1 group io configuration registers base
> > address
> > + - description: bm2 group io configuration registers base
> > address
> > + - description: bm3 group io configuration registers base
> > address
> > + - description: lt group io configuration registers base
> > address
> > + - description: lm1 group io configuration registers base
> > address
> > + - description: lm2 group io configuration registers base
> > address
> > + - description: lb1 group io configuration registers base
> > address
> > + - description: lb2 group io configuration registers base
> > address
> > + - description: tm1 group io configuration registers base
> > address
> > + - description: tm2 group io configuration registers base
> > address
> > + - description: tm3 group io configuration registers base
> > address
> > +
> > + reg-names:
> > + items:
> > + - const: iocfg0
> > + - const: iocfg_rt
> > + - const: iocfg_rm1
> > + - const: iocfg_rm2
> > + - const: iocfg_rb
> > + - const: iocfg_bm1
> > + - const: iocfg_bm2
> > + - const: iocfg_bm3
> > + - const: iocfg_lt
> > + - const: iocfg_lm1
> > + - const: iocfg_lm2
> > + - const: iocfg_lb1
> > + - const: iocfg_lb2
> > + - const: iocfg_tm1
> > + - const: iocfg_tm2
> > + - const: iocfg_tm3
>
> Same here, drop iocfg_ prefix everywhere. The first entry becames
> then
> "base" or whatever else meaningful ("0" is not meaningful).
Ok, it will be fixed in next version.
>
>
> > +
> > + interrupt-controller: true
> > +
> > + '#interrupt-cells':
> > + const: 2
> > +
> > + interrupts:
> > + description: The interrupt outputs to sysirq.
> > + maxItems: 1
> > +
> > +# PIN CONFIGURATION NODES
> > +patternProperties:
> > + '-pins$':
> > + type: object
> > + additionalProperties: false
> > +
> > + patternProperties:
> > + '^pins':
> > + type: object
> > + $ref: /schemas/pinctrl/pincfg-node.yaml
> > + additionalProperties: false
> > + description:
> > + A pinctrl node should contain at least one subnode
> > representing the
> > + pinctrl groups available on the machine. Each subnode
> > will list the
> > + pins it needs, and how they should be configured, with
> > regard to muxer
> > + configuration, pullups, drive strength, input
> > enable/disable and input
> > + schmitt.
> > +
> > + properties:
> > + pinmux:
> > + description:
> > + Integer array, represents gpio pin number and mux
> > setting.
> > + Supported pin number and mux varies for different
> > SoCs, and are
> > + defined as macros in
> > arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h
> > + directly, for this SoC.
> > +
> > + drive-strength:
> > + enum: [2, 4, 6, 8, 10, 12, 14, 16]
> > +
> > + bias-pull-down:
> > + oneOf:
> > + - type: boolean
> > + - enum: [100, 101, 102, 103]
> > + description: mt8196 pull down PUPD/R0/R1 type
> > define value.
> > + - enum: [75000, 5000]
> > + description: mt8196 pull down RSEL type si unit
> > value(ohm).
> > + description: |
> > + For pull down type is normal, it doesn't need add
> > R1R0 define
> > + and resistance value.
> > + For pull down type is PUPD/R0/R1 type, it can add
> > R1R0 define to
> > + set different resistance. It can support
> > "MTK_PUPD_SET_R1R0_00" &
> > + "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
> > + "MTK_PUPD_SET_R1R0_11" define in mt8196.
> > + For pull down type is PD/RSEL, it can add resistance
> > value(ohm)
> > + to set different resistance by identifying property
> > + "mediatek,rsel-resistance-in-si-unit". It can
> > support resistance
> > + value(ohm) "75000" & "5000" in mt8196.
> > +
> > + bias-pull-up:
> > + oneOf:
> > + - type: boolean
> > + - enum: [100, 101, 102, 103]
> > + description: mt8196 pull up PUPD/R0/R1 type define
> > value.
> > + - enum: [1000, 1500, 2000, 3000, 4000, 5000, 75000]
> > + description: mt8196 pull up RSEL type si unit
> > value(ohm).
> > + description: |
> > + For pull up type is normal, it don't need add R1R0
> > define
> > + and resistance value.
> > + For pull up type is PUPD/R0/R1 type, it can add R1R0
> > define to
> > + set different resistance. It can support
> > "MTK_PUPD_SET_R1R0_00" &
> > + "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
> > + "MTK_PUPD_SET_R1R0_11" define in mt8196.
> > + For pull up type is PU/RSEL, it can add resistance
> > value(ohm)
> > + to set different resistance by identifying property
> > + "mediatek,rsel-resistance-in-si-unit". It can
> > support resistance
> > + value(ohm) "1000" & "1500" & "2000" & "3000" &
> > "4000" & "5000" &
> > + "75000" in mt8196.
> > +
> > + bias-disable: true
> > +
> > + output-high: true
> > +
> > + output-low: true
> > +
> > + input-enable: true
> > +
> > + input-disable: true
> > +
> > + input-schmitt-enable: true
> > +
> > + input-schmitt-disable: true
> > +
> > + required:
> > + - pinmux
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - interrupt-controller
> > + - '#interrupt-cells'
> > + - gpio-controller
> > + - '#gpio-cells'
> > + - gpio-ranges
>
> Same order as in properties list. The order here looks correct, so
> the
> properties needs to be fixed.
Ok, it will be fixed in next version.
>
>
> Best regards,
> Krzysztof
>
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