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Message-ID:
<CH2PPF4D26F8E1C8DB1C7AB88332A3C454DA2A42@CH2PPF4D26F8E1C.namprd07.prod.outlook.com>
Date: Mon, 24 Mar 2025 09:12:19 +0000
From: Manikandan Karunakaran Pillai <mpillai@...ence.com>
To: "lpieralisi@...nel.org" <lpieralisi@...nel.org>,
"manivannan.sadhasivam@...aro.org" <manivannan.sadhasivam@...aro.org>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"kw@...ux.com" <kw@...ux.com>, "robh@...nel.org" <robh@...nel.org>,
"devicetree@...r.kernel.org"
<devicetree@...r.kernel.org>
CC: "manivannan.sadhasivam@...aro.org" <manivannan.sadhasivam@...aro.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>
Subject: [PATCH 6/6] PCI: cadence: Update support for TI J721e boards
Update the support for TI J721 boards to use the updated Cadence
PCIe controller code
Signed-off-by: Manikandan K Pillai <mpillai@...ence.com>
---
drivers/pci/controller/cadence/pci-j721e.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
index 0341d51d6aed..118c87fb9381 100644
--- a/drivers/pci/controller/cadence/pci-j721e.c
+++ b/drivers/pci/controller/cadence/pci-j721e.c
@@ -164,6 +164,14 @@ static const struct cdns_pcie_ops j721e_pcie_ops = {
.start_link = j721e_pcie_start_link,
.stop_link = j721e_pcie_stop_link,
.link_up = j721e_pcie_link_up,
+ .pcie_host_init_root_port = cdns_pcie_host_init_root_port,
+ .pcie_host_bar_ib_config = cdns_pcie_host_bar_ib_config,
+ .pcie_host_init_address_translation = cdns_pcie_host_init_address_translation,
+ .pcie_detect_quiet_min_delay_set = cdns_pcie_detect_quiet_min_delay_set,
+ .pcie_set_outbound_region = cdns_pcie_set_outbound_region,
+ .pcie_set_outbound_region_for_normal_msg =
+ cdns_pcie_set_outbound_region_for_normal_msg,
+ .pcie_reset_outbound_region = cdns_pcie_reset_outbound_region,
};
static int j721e_pcie_set_mode(struct j721e_pcie *pcie, struct regmap *syscon,
--
2.27.0
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