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Message-ID: <3fa79b755e9c6b4bfeeb38f981c4e030844f8539.camel@siemens.com>
Date: Tue, 25 Mar 2025 19:12:36 +0000
From: "Sverdlin, Alexander" <alexander.sverdlin@...mens.com>
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Subject: Re: [PATCH v10 12/13] drm/atomic-helper: Re-order bridge chain
pre-enable and post-disable
On Wed, 2025-02-26 at 21:27 +0530, Aradhya Bhatia wrote:
> Move the bridge pre_enable call before crtc enable, and the bridge
> post_disable call after the crtc disable.
>
> The sequence of enable after this patch will look like:
>
> bridge[n]_pre_enable
> ...
> bridge[1]_pre_enable
>
> crtc_enable
> encoder_enable
>
> bridge[1]_enable
> ...
> bridge[n]_enable
>
> And, the disable sequence for the display pipeline will look like:
>
> bridge[n]_disable
> ...
> bridge[1]_disable
>
> encoder_disable
> crtc_disable
>
> bridge[1]_post_disable
> ...
> bridge[n]_post_disable
>
> The definition of bridge pre_enable hook says that,
> "The display pipe (i.e. clocks and timing signals) feeding this bridge
> will not yet be running when this callback is called".
>
> Since CRTC is also a source feeding the bridge, it should not be enabled
> before the bridges in the pipeline are pre_enabled. Fix that by
> re-ordering the sequence of bridge pre_enable and bridge post_disable.
>
> Acked-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
> Tested-by: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
> Signed-off-by: Aradhya Bhatia <a-bhatia1@...com>
> Signed-off-by: Aradhya Bhatia <aradhya.bhatia@...ux.dev>
Tested with AM62 OLDI series [1] on AM625 with single channel AUO 800x480
LVDS panel. No issues with the patch!
Tested-by: Alexander Sverdlin <alexander.sverdlin@...mens.com>
[1] Link: https://lore.kernel.org/all/20250226181300.756610-1-aradhya.bhatia@linux.dev/
> ---
> drivers/gpu/drm/drm_atomic_helper.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
--
Alexander Sverdlin
Siemens AG
www.siemens.com
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