[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <174289539246.14745.2388513944980339068.tip-bot2@tip-bot2>
Date: Tue, 25 Mar 2025 09:36:32 -0000
From: "tip-bot2 for Ahmed S. Darwish" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: "Ahmed S. Darwish" <darwi@...utronix.de>, Ingo Molnar <mingo@...nel.org>,
"H. Peter Anvin" <hpa@...or.com>,
Linus Torvalds <torvalds@...ux-foundation.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject:
[tip: x86/cpu] x86/cacheinfo: Align ci_info_init() assignment expressions
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 036a73b5174477b72d881b4c75740d3dbfd7ec49
Gitweb: https://git.kernel.org/tip/036a73b5174477b72d881b4c75740d3dbfd7ec49
Author: Ahmed S. Darwish <darwi@...utronix.de>
AuthorDate: Mon, 24 Mar 2025 14:33:04 +01:00
Committer: Ingo Molnar <mingo@...nel.org>
CommitterDate: Tue, 25 Mar 2025 10:22:26 +01:00
x86/cacheinfo: Align ci_info_init() assignment expressions
The ci_info_init() function initializes 10 members of a 'struct cacheinfo'
instance using passed data from CPUID leaf 0x4.
Such assignment expressions are difficult to read in their current form.
Align them for clarity.
Signed-off-by: Ahmed S. Darwish <darwi@...utronix.de>
Signed-off-by: Ingo Molnar <mingo@...nel.org>
Cc: H. Peter Anvin <hpa@...or.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Link: https://lore.kernel.org/r/20250324133324.23458-10-darwi@linutronix.de
---
arch/x86/kernel/cpu/cacheinfo.c | 23 ++++++++++-------------
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c
index fc4b49e..b273ecf 100644
--- a/arch/x86/kernel/cpu/cacheinfo.c
+++ b/arch/x86/kernel/cpu/cacheinfo.c
@@ -936,19 +936,16 @@ static void __cache_cpumap_setup(unsigned int cpu, int index,
static void ci_info_init(struct cacheinfo *ci,
const struct _cpuid4_info_regs *base)
{
- ci->id = base->id;
- ci->attributes = CACHE_ID;
- ci->level = base->eax.split.level;
- ci->type = cache_type_map[base->eax.split.type];
- ci->coherency_line_size =
- base->ebx.split.coherency_line_size + 1;
- ci->ways_of_associativity =
- base->ebx.split.ways_of_associativity + 1;
- ci->size = base->size;
- ci->number_of_sets = base->ecx.split.number_of_sets + 1;
- ci->physical_line_partition =
- base->ebx.split.physical_line_partition + 1;
- ci->priv = base->nb;
+ ci->id = base->id;
+ ci->attributes = CACHE_ID;
+ ci->level = base->eax.split.level;
+ ci->type = cache_type_map[base->eax.split.type];
+ ci->coherency_line_size = base->ebx.split.coherency_line_size + 1;
+ ci->ways_of_associativity = base->ebx.split.ways_of_associativity + 1;
+ ci->size = base->size;
+ ci->number_of_sets = base->ecx.split.number_of_sets + 1;
+ ci->physical_line_partition = base->ebx.split.physical_line_partition + 1;
+ ci->priv = base->nb;
}
int init_cache_level(unsigned int cpu)
Powered by blists - more mailing lists