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Message-Id: <20250325102610.2073863-2-maz@kernel.org>
Date: Tue, 25 Mar 2025 10:25:58 +0000
From: Marc Zyngier <maz@...nel.org>
To: linux-arm-kernel@...ts.infradead.org,
linux-pci@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
asahi@...ts.linux.dev
Cc: Alyssa Rosenzweig <alyssa@...enzweig.io>,
Janne Grunau <j@...nau.net>,
Hector Martin <marcan@...can.st>,
Sven Peter <sven@...npeter.dev>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>
Subject: [PATCH v2 01/13] dt-bindings: pci: apple,pcie: Add t6020 compatible string
From: Alyssa Rosenzweig <alyssa@...enzweig.io>
t6020 adds some register ranges compared to t8103, so requires
a new compatible as well as the new PHY registers themselves.
Signed-off-by: Alyssa Rosenzweig <alyssa@...enzweig.io>
[maz: added PHY registers]
Signed-off-by: Marc Zyngier <maz@...nel.org>
---
Documentation/devicetree/bindings/pci/apple,pcie.yaml | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
index c8775f9cb0713..77554899b9420 100644
--- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
@@ -17,6 +17,10 @@ description: |
implements its root ports. But the ATU found on most DesignWare
PCIe host bridges is absent.
+ On systems derived from T602x, the PHY registers are in a region
+ separate from the port registers. In that case, there is one PHY
+ register range per port register range.
+
All root ports share a single ECAM space, but separate GPIOs are
used to take the PCI devices on those ports out of reset. Therefore
the standard "reset-gpios" and "max-link-speed" properties appear on
@@ -35,11 +39,12 @@ properties:
- apple,t8103-pcie
- apple,t8112-pcie
- apple,t6000-pcie
+ - apple,t6020-pcie
- const: apple,pcie
reg:
minItems: 3
- maxItems: 6
+ maxItems: 10
reg-names:
minItems: 3
@@ -50,6 +55,10 @@ properties:
- const: port1
- const: port2
- const: port3
+ - const: phy0
+ - const: phy1
+ - const: phy2
+ - const: phy3
ranges:
minItems: 2
--
2.39.2
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