[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20250325115736.1732721-5-lukma@denx.de>
Date: Tue, 25 Mar 2025 12:57:35 +0100
From: Lukasz Majewski <lukma@...x.de>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Paolo Abeni <pabeni@...hat.com>,
Jakub Kicinski <kuba@...nel.org>,
Eric Dumazet <edumazet@...gle.com>,
davem@...emloft.net,
Andrew Lunn <andrew+netdev@...n.ch>
Cc: Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
devicetree@...r.kernel.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Richard Cochran <richardcochran@...il.com>,
netdev@...r.kernel.org,
Maxime Chevallier <maxime.chevallier@...tlin.com>,
Lukasz Majewski <lukma@...x.de>
Subject: [PATCH 4/5] arm: dts: imx287: Provide description for MTIP L2 switch
This description is similar to one supprted with the cpsw_new.c
driver.
It has separated ports and PHYs (connected to mdio bus).
Signed-off-by: Lukasz Majewski <lukma@...x.de>
---
arch/arm/boot/dts/nxp/mxs/imx28-xea.dts | 56 +++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts
index 6c5e6856648a..e645b086574d 100644
--- a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts
+++ b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts
@@ -5,6 +5,7 @@
*/
/dts-v1/;
+#include<dt-bindings/interrupt-controller/irq.h>
#include "imx28-lwe.dtsi"
/ {
@@ -18,6 +19,61 @@ &can0 {
status = "okay";
};
+ð_switch {
+ compatible = "fsl,imx287-mtip-switch";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mac0_pins_a>, <&mac1_pins_a>;
+ phy-supply = <®_fec_3v3>;
+ phy-reset-duration = <25>;
+ phy-reset-post-delay = <10>;
+ interrupts = <100>, <101>, <102>;
+ clocks = <&clks 57>, <&clks 57>, <&clks 64>, <&clks 35>;
+ clock-names = "ipg", "ahb", "enet_out", "ptp";
+ status = "okay";
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mtip_port1: port@1 {
+ reg = <1>;
+ label = "lan0";
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ };
+
+ mtip_port2: port@2 {
+ reg = <2>;
+ label = "lan1";
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ smsc,disable-energy-detect;
+ /* Both PHYs (i.e. 0,1) have the same, single GPIO, */
+ /* line to handle both, their interrupts (AND'ed) */
+ interrupt-parent = <&gpio4>;
+ interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ smsc,disable-energy-detect;
+ interrupt-parent = <&gpio4>;
+ interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
+ };
+ };
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_b>;
--
2.39.5
Powered by blists - more mailing lists