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Message-ID: <CAGd6pzNW2JKxTfQ8rLD8V7bdUgq8fc0R+ayChf3J0VdRm9Ptrg@mail.gmail.com>
Date: Tue, 25 Mar 2025 17:29:59 +0530
From: Siddharth Menon <simeddon@...il.com>
To: Marcelo Schmitt <marcelo.schmitt1@...il.com>
Cc: linux-iio@...r.kernel.org, lars@...afoo.de, Michael.Hennerich@...log.com,
jic23@...nel.org, gregkh@...uxfoundation.org, linux-kernel@...r.kernel.org,
linux-staging@...ts.linux.dev
Subject: Re: [PATCH v3] iio: frequency: ad9832: Use FIELD_PREP macro to set
bit fields
On Sat, 22 Mar 2025 at 18:50, Marcelo Schmitt
<marcelo.schmitt1@...il.com> wrote:
>
> On 03/19, Siddharth Menon wrote:
> > Refactor code to use the FIELD_PREP macro for setting bit fields
> > instead of manual bit manipulation.
>
> The word 'refactor' by itself isn't very appealing.
> Instead, maybe promote how the patch improves code readability saying something
> like 'Use bitfield macros to clearly specify AD9832 SPI command fields and to
> make register write code more readable.' Use that exact text if you want.
>
Thanks for the feedback, I will update the commit message.
> I think AD9832_PHASE and RES_MASK could also be declared as a mask, but maybe
> that change can be made on a separate patch.
I shall send in another patch addressing this.
> > - st->data = cpu_to_be16((AD9832_CMD_SYNCSELSRC << CMD_SHIFT) |
> > + st->data = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, AD9832_CMD_SYNCSELSRC) |
> > st->ctrl_ss);
> Not sure about this assignment with mix of FIELD_PREP and non-FIELD_PREP value.
> Maybe have
> FIELD_PREP(AD9832_DAT_MSK, st->ctrl_ss)); ?
>From what I understood, I don't think that would work out. AD9832_SELSRC
= BIT(12) but AD9832_DAT_MSK only covers bits 7 through 0 GENMASK(7, 0).
It could exceed the maximum value allowed by the mask.
Thanks,
Siddharth Menon
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