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Message-Id: <20250325121624.523258-8-guoren@kernel.org>
Date: Tue, 25 Mar 2025 08:15:48 -0400
From: guoren@...nel.org
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Subject: [RFC PATCH V3 07/43] rv64ilp32_abi: riscv: arch_hweight: Adapt cpopw & cpop of zbb extension
From: "Guo Ren (Alibaba DAMO Academy)" <guoren@...nel.org>
The RV64ILP32 ABI is based on 64-bit ISA, but BITS_PER_LONG is 32.
Use cpopw for u32_weight and cpop for u64_weight.
Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@...nel.org>
---
arch/riscv/include/asm/arch_hweight.h | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/arch_hweight.h b/arch/riscv/include/asm/arch_hweight.h
index 613769b9cdc9..42577965f5bb 100644
--- a/arch/riscv/include/asm/arch_hweight.h
+++ b/arch/riscv/include/asm/arch_hweight.h
@@ -12,7 +12,11 @@
#if (BITS_PER_LONG == 64)
#define CPOPW "cpopw "
#elif (BITS_PER_LONG == 32)
+#ifdef CONFIG_64BIT
+#define CPOPW "cpopw "
+#else
#define CPOPW "cpop "
+#endif
#else
#error "Unexpected BITS_PER_LONG"
#endif
@@ -47,7 +51,7 @@ static inline unsigned int __arch_hweight8(unsigned int w)
return __arch_hweight32(w & 0xff);
}
-#if BITS_PER_LONG == 64
+#ifdef CONFIG_64BIT
static __always_inline unsigned long __arch_hweight64(__u64 w)
{
# ifdef CONFIG_RISCV_ISA_ZBB
@@ -61,7 +65,7 @@ static __always_inline unsigned long __arch_hweight64(__u64 w)
".option pop\n"
: "=r" (w) : "r" (w) :);
- return w;
+ return (unsigned long)w;
legacy:
# endif
--
2.40.1
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