lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20250325121624.523258-9-guoren@kernel.org>
Date: Tue, 25 Mar 2025 08:15:49 -0400
From: guoren@...nel.org
To: arnd@...db.de,
	gregkh@...uxfoundation.org,
	torvalds@...ux-foundation.org,
	paul.walmsley@...ive.com,
	palmer@...belt.com,
	anup@...infault.org,
	atishp@...shpatra.org,
	oleg@...hat.com,
	kees@...nel.org,
	tglx@...utronix.de,
	will@...nel.org,
	mark.rutland@....com,
	brauner@...nel.org,
	akpm@...ux-foundation.org,
	rostedt@...dmis.org,
	edumazet@...gle.com,
	unicorn_wang@...look.com,
	inochiama@...look.com,
	gaohan@...as.ac.cn,
	shihua@...as.ac.cn,
	jiawei@...as.ac.cn,
	wuwei2016@...as.ac.cn,
	drew@...7.com,
	prabhakar.mahadev-lad.rj@...renesas.com,
	ctsai390@...estech.com,
	wefu@...hat.com,
	kuba@...nel.org,
	pabeni@...hat.com,
	josef@...icpanda.com,
	dsterba@...e.com,
	mingo@...hat.com,
	peterz@...radead.org,
	boqun.feng@...il.com,
	guoren@...nel.org,
	xiao.w.wang@...el.com,
	qingfang.deng@...lower.com.cn,
	leobras@...hat.com,
	jszhang@...nel.org,
	conor.dooley@...rochip.com,
	samuel.holland@...ive.com,
	yongxuan.wang@...ive.com,
	luxu.kernel@...edance.com,
	david@...hat.com,
	ruanjinjie@...wei.com,
	cuiyunhui@...edance.com,
	wangkefeng.wang@...wei.com,
	qiaozhe@...as.ac.cn
Cc: ardb@...nel.org,
	ast@...nel.org,
	linux-kernel@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	kvm@...r.kernel.org,
	kvm-riscv@...ts.infradead.org,
	linux-mm@...ck.org,
	linux-crypto@...r.kernel.org,
	bpf@...r.kernel.org,
	linux-input@...r.kernel.org,
	linux-perf-users@...r.kernel.org,
	linux-serial@...r.kernel.org,
	linux-fsdevel@...r.kernel.org,
	linux-arch@...r.kernel.org,
	maple-tree@...ts.infradead.org,
	linux-trace-kernel@...r.kernel.org,
	netdev@...r.kernel.org,
	linux-atm-general@...ts.sourceforge.net,
	linux-btrfs@...r.kernel.org,
	netfilter-devel@...r.kernel.org,
	coreteam@...filter.org,
	linux-nfs@...r.kernel.org,
	linux-sctp@...r.kernel.org,
	linux-usb@...r.kernel.org,
	linux-media@...r.kernel.org
Subject: [RFC PATCH V3 08/43] rv64ilp32_abi: riscv: bitops: Adapt ctzw & clzw of zbb extension

From: "Guo Ren (Alibaba DAMO Academy)" <guoren@...nel.org>

The RV64ILP32 ABI is based on 64-bit ISA, but BITS_PER_LONG is 32.
Use ctzw and clzw for int and long types instead of ctz and clz.

Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@...nel.org>
---
 arch/riscv/include/asm/bitops.h | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h
index c6bd3d8354a9..d041b9e3ba84 100644
--- a/arch/riscv/include/asm/bitops.h
+++ b/arch/riscv/include/asm/bitops.h
@@ -35,14 +35,27 @@
 #include <asm/alternative-macros.h>
 #include <asm/hwcap.h>
 
-#if (BITS_PER_LONG == 64)
+#if (__riscv_xlen == 64)
 #define CTZW	"ctzw "
 #define CLZW	"clzw "
+
+#if (BITS_PER_LONG == 64)
+#define CTZ	"ctz "
+#define CLZ	"clz "
 #elif (BITS_PER_LONG == 32)
+#define CTZ	"ctzw "
+#define CLZ	"clzw "
+#else
+#error "Unexpected BITS_PER_LONG"
+#endif
+
+#elif (__riscv_xlen == 32)
 #define CTZW	"ctz "
 #define CLZW	"clz "
+#define CTZ	"ctz "
+#define CLZ	"clz "
 #else
-#error "Unexpected BITS_PER_LONG"
+#error "Unexpected __riscv_xlen"
 #endif
 
 static __always_inline unsigned long variable__ffs(unsigned long word)
@@ -53,7 +66,7 @@ static __always_inline unsigned long variable__ffs(unsigned long word)
 
 	asm volatile (".option push\n"
 		      ".option arch,+zbb\n"
-		      "ctz %0, %1\n"
+		      CTZ "%0, %1\n"
 		      ".option pop\n"
 		      : "=r" (word) : "r" (word) :);
 
@@ -82,7 +95,7 @@ static __always_inline unsigned long variable__fls(unsigned long word)
 
 	asm volatile (".option push\n"
 		      ".option arch,+zbb\n"
-		      "clz %0, %1\n"
+		      CLZ "%0, %1\n"
 		      ".option pop\n"
 		      : "=r" (word) : "r" (word) :);
 
-- 
2.40.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ