linux-kernel - Re: [PATCH v1 1/3] arm64: defconfig: enable PCI Power Control for PCIe3

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Message-ID: <a0c0d25d-4004-4a95-83c0-36fc76c35e7b@quicinc.com>
Date: Wed, 26 Mar 2025 10:24:31 +0800
From: "Wenbin Yao (Consultant)" <quic_wenbyao@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Bartosz Golaszewski <brgl@...ev.pl>
CC: <andersson@...nel.org>, <konradybcio@...nel.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <catalin.marinas@....com>,
        <will@...nel.org>, <quic_qianyu@...cinc.com>, <sfr@...b.auug.org.au>,
        <linux-arm-kernel@...ts.infradead.org>,
        "Bartosz
 Golaszewski" <bartosz.golaszewski@...aro.org>
Subject: Re: [PATCH v1 1/3] arm64: defconfig: enable PCI Power Control for
 PCIe3

On 3/24/2025 3:38 PM, Krzysztof Kozlowski wrote:
> On 24/03/2025 08:09, Wenbin Yao (Consultant) wrote:
>> On 3/21/2025 5:43 PM, Bartosz Golaszewski wrote:
>>> On Fri, Mar 21, 2025 at 8:37 AM Krzysztof Kozlowski <krzk@...nel.org> wrote:
>>>> On 20/03/2025 06:55, Wenbin Yao wrote:
>>>>> From: Qiang Yu <quic_qianyu@...cinc.com>
>>>>>
>>>>> Enable the pwrctrl driver, which is utilized to manage the power supplies
>>>>> of the devices connected to the PCI slots. This ensures that the voltage
>>>>> rails of the x8 PCI slots on the X1E80100 - QCP can be correctly turned
>>>>> on/off if they are described under PCIe port device tree node.
>>>>>
>>>>> Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
>>>>> Signed-off-by: Wenbin Yao <quic_wenbyao@...cinc.com>
>>>>> ---
>>>>>    arch/arm64/configs/defconfig | 1 +
>>>>>    1 file changed, 1 insertion(+)
>>>>>
>>>>> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
>>>>> index 85ec2fba1..de86d1121 100644
>>>>> --- a/arch/arm64/configs/defconfig
>>>>> +++ b/arch/arm64/configs/defconfig
>>>>> @@ -245,6 +245,7 @@ CONFIG_PCIE_LAYERSCAPE_GEN4=y
>>>>>    CONFIG_PCI_ENDPOINT=y
>>>>>    CONFIG_PCI_ENDPOINT_CONFIGFS=y
>>>>>    CONFIG_PCI_EPF_TEST=m
>>>>> +CONFIG_PCI_PWRCTL_SLOT=y
>>>> Bartosz,
>>>>
>>>> Wasn't the intention to select it the same way as PCI_PWRCTL_PWRSEQ is
>>>> selected?
>>>>
>>>> Best regards,
>>>> Krzysztof
>>>>
>>> For sure. I would expect there to be something like:
>>>
>>> select PCI_PWRCTL_SLOT if ARCH_QCOM
>>>
>>> in Kconfig and nothing in defconfig.
>>>
>>> Bartosz
>> IIUC, pci slot power driver is a common driver that could be used by all DT
>> based platform.
>
> You are not responding to the raised problem.

There is a slight difference between PCI_PWRCTL_SLOT and PCI_PWRCTL_PWRSEQ.
PCI_PWRCTL_PWRSEQ is selected by ath11k/ath12k, but PCI_PWRCTL_SLOT has no
specific endpoint device driver to select it. Could PCI_PWRCTL_SLOT be
selected along with HAVE_PWRCTL when ARCH_QCOM is enabled? Or can we add
select PCI_PWRCTL_SLOT if HAVE_PWRCTL in the Kconfig of portdrv?

>
> Best regards,
> Krzysztof

-- 
With best wishes
Wenbin