linux-kernel - Re: [PATCH 1/2] arm64: dts: qcom: sa8775p: add QCrypto node

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Message-ID: <tlwqz7qfdunrpsbjhk3kl3tz6zbkthv737pjvnphbz73zdqaph@7xcimtpeplbv>
Date: Wed, 26 Mar 2025 19:34:00 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Yuvaraj Ranganathan <quic_yrangana@...cinc.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] arm64: dts: qcom: sa8775p: add QCrypto node

On Thu, Feb 27, 2025 at 11:38:16PM +0530, Yuvaraj Ranganathan wrote:
> The initial QCE node change is reverted by the following patch 
> https://lore.kernel.org/all/20250128115333.95021-1-krzysztof.kozlowski@linaro.org/
> because of the build warning,
> 
>   sa8775p-ride.dtb: crypto@...a000: compatible: 'oneOf' conditional failed, one must be fixed:
>     ...
>     'qcom,sa8775p-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce']
> 
> Add the QCE node back that fix the warnings.
> 
> Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@...cinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 23049cc58896..b0d77b109305 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -2418,6 +2418,18 @@ cryptobam: dma-controller@...4000 {
>  				 <&apps_smmu 0x481 0x00>;
>  		};
>  
> +		crypto: crypto@...a000 {
> +			compatible = "qcom,sa8775p-qce", "qcom,sm8150-qce", "qcom,qce";
> +			reg = <0x0 0x01dfa000 0x0 0x6000>;
> +			dmas = <&cryptobam 4>, <&cryptobam 5>;
> +			dma-names = "rx", "tx";
> +			iommus = <&apps_smmu 0x480 0x00>,
> +				 <&apps_smmu 0x481 0x00>;
> +			interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 0
> +					 &mc_virt SLAVE_EBI1 0>;

QCOM_ICC_TAG_ALWAYS

> +			interconnect-names = "memory";
> +		};
> +
>  		stm: stm@...2000 {
>  			compatible = "arm,coresight-stm", "arm,primecell";
>  			reg = <0x0 0x4002000 0x0 0x1000>,
> -- 
> 2.34.1
> 

-- 
With best wishes
Dmitry