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Message-ID: <20250326-headpiece-muskiness-dc167183018e@spud>
Date: Wed, 26 Mar 2025 17:55:42 +0000
From: Conor Dooley <conor@...nel.org>
To: Pinkesh Vaghela <pinkesh.vaghela@...fochips.com>
Cc: Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Paul Walmsley <paul.walmsley@...ive.com>,
Samuel Holland <samuel.holland@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Min Lin <linmin@...incomputing.com>,
Pritesh Patel <pritesh.patel@...fochips.com>,
Yangyu Chen <cyy@...self.name>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Yu Chien Peter Lin <peterlin@...estech.com>,
Charlie Jenkins <charlie@...osinc.com>,
Kanak Shilledar <kanakshilledar@...il.com>,
Darshan Prajapati <darshan.prajapati@...fochips.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Heiko Stuebner <heiko@...ech.de>, Aradhya Bhatia <a-bhatia1@...com>,
"rafal@...ecki.pl" <rafal@...ecki.pl>,
Anup Patel <anup@...infault.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 09/10] riscv: dts: add initial support for EIC7700 SoC
On Wed, Mar 26, 2025 at 02:20:55PM +0000, Pinkesh Vaghela wrote:
> On Tue, Mar 25, 2025 at 7:06 PM, Emil Renner Berthing wrote:
> > Pinkesh Vaghela wrote:
> > > + soc {
> > > + compatible = "simple-bus";
> > > + ranges;
> > > + interrupt-parent = <&plic>;
> > > + #address-cells = <2>;
> > > + #size-cells = <2>;
> >
> > Hi Pinkesh,
> >
> > Thank your for the patches!
> >
> > Should this not be marked dma-noncoherent to avoid having to mark each
> > peripheral as such?
>
> Thanks for your feedback.
>
> We have not added "dma-noncoherent" because there are no DMA-capable
> peripherals in the devicetree yet.
> We planned to add this later when we add any DMA capable devices
> i.e. sdhci, gmac, sata, pcie, spi.
>
> Do you recommend to add this property in current version?
If the bus is not cache coherent, then it should be marked as such now.
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