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Message-ID: <CA+V-a8tBGdAFoUW1Dt2wZTeQBcVts-CGc9DgC24uvtFSfoUFeA@mail.gmail.com> Date: Wed, 26 Mar 2025 19:21:03 +0000 From: "Lad, Prabhakar" <prabhakar.csengg@...il.com> To: "Rob Herring (Arm)" <robh@...nel.org> Cc: linux-mmc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org, linux-gpio@...r.kernel.org, Magnus Damm <magnus.damm@...il.com>, linux-serial@...r.kernel.org, Michael Turquette <mturquette@...libre.com>, Linus Walleij <linus.walleij@...aro.org>, Wolfram Sang <wsa+renesas@...g-engineering.com>, Geert Uytterhoeven <geert+renesas@...der.be>, Conor Dooley <conor+dt@...nel.org>, Will Deacon <will@...nel.org>, Biju Das <biju.das.jz@...renesas.com>, Catalin Marinas <catalin.marinas@....com>, Krzysztof Kozlowski <krzk+dt@...nel.org>, devicetree@...r.kernel.org, Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>, linux-renesas-soc@...r.kernel.org, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, linux-kernel@...r.kernel.org, Jiri Slaby <jirislaby@...nel.org>, Ulf Hansson <ulf.hansson@...aro.org>, Stephen Boyd <sboyd@...nel.org>, Fabrizio Castro <fabrizio.castro.jz@...esas.com> Subject: Re: [PATCH 00/15] Add support for Renesas RZ/V2N SoC and EVK Hi Rob, On Wed, Mar 26, 2025 at 7:11 PM Rob Herring (Arm) <robh@...nel.org> wrote: > > > On Wed, 26 Mar 2025 14:39:30 +0000, Prabhakar wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com> > > > > This patch series adds initial support for the Renesas RZ/V2N (R9A09G056) > > SoC and its evaluation board (EVK). The Renesas RZ/V2N is a vision AI > > microprocessor (MPU) designed for power-efficient AI inference and > > real-time vision processing. It features Renesas' proprietary AI > > accelerator (DRP-AI3), delivering up to 15 TOPS AI performance, making > > it ideal for applications such as Driver Monitoring Systems (DMS), > > industrial monitoring cameras, and mobile robots. > > > > Key features of the RZ/V2N SoC: > > Processing Power: > > - Quad Arm Cortex-A55 cores at 1.8GHz for high-performance computing > > - Single Arm Cortex-M33 core at 200MHz for real-time processing > > - 1.5MB on-chip SRAM for fast data access > > - LPDDR4/LPDDR4X memory interface for high-speed RAM access > > > > AI and Vision Processing: > > - DRP-AI3 accelerator for low-power, high-efficiency AI inference > > - Arm Mali-C55 ISP (optional) for image signal processing > > - Dual MIPI CSI-2 camera interfaces for multi-camera support > > > > High-Speed Interfaces: > > - PCIe Gen3 (2-lane) 1ch for external device expansion > > - USB 3.2 (Gen2) 1ch (Host-only) for high-speed data transfer > > - USB 2.0 (Host/Function) 1ch for legacy connectivity > > - Gigabit Ethernet (2 channels) for network communication > > > > Industrial and Automotive Features: > > - 6x CAN FD channels for automotive and industrial networking > > - 24-channel ADC for sensor data acquisition > > > > LINK: https://tinyurl.com/renesas-rz-v2n-soc > > > > The series introduces: > > - Device tree bindings for various subsystems (SYS, SCIF, SDHI, CPG, pinctrl). > > - RZ/V2N SoC identification support. > > - Clock and pinctrl driver updates for RZ/V2N. > > - Initial DTSI and device tree for the RZ/V2N SoC and EVK. > > - Enabling RZ/V2N SoC support in `arm64 defconfig`. > > > > These patches have been tested on the RZ/V2N EVK with v6.14, > > logs can be found here https://pastebin.com/8i3jgVby > > > > Cheers, > > Prabhakar > > > > Lad Prabhakar (15): > > dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants > > dt-bindings: soc: renesas: Document RZ/V2N EVK board > > soc: renesas: Add config option for RZ/V2N (R9A09G056) SoC > > dt-bindings: soc: renesas: Document SYS for RZ/V2N SoC > > soc: renesas: sysc: Add SoC identification for RZ/V2N SoC > > dt-bindings: serial: renesas: Document RZ/V2N SCIF > > dt-bindings: mmc: renesas,sdhi: Document RZ/V2N support > > dt-bindings: clock: renesas: Document RZ/V2N SoC CPG > > clk: renesas: rzv2h-cpg: Sort compatible list based on SoC part number > > clk: renesas: rzv2h: Add support for RZ/V2N SoC > > dt-bindings: pinctrl: renesas: Document RZ/V2N SoC > > pinctrl: renesas: rzg2l: Add support for RZ/V2N SoC > > arm64: dts: renesas: Add initial SoC DTSI for RZ/V2N > > arm64: dts: renesas: Add initial device tree for RZ/V2N EVK > > arm64: defconfig: Enable Renesas RZ/V2N SoC > > > > .../bindings/clock/renesas,rzv2h-cpg.yaml | 5 +- > > .../devicetree/bindings/mmc/renesas,sdhi.yaml | 4 +- > > .../pinctrl/renesas,rzg2l-pinctrl.yaml | 2 + > > .../bindings/serial/renesas,scif.yaml | 1 + > > .../soc/renesas/renesas,r9a09g057-sys.yaml | 1 + > > .../bindings/soc/renesas/renesas.yaml | 15 + > > arch/arm64/boot/dts/renesas/Makefile | 2 + > > arch/arm64/boot/dts/renesas/r9a09g056.dtsi | 264 ++++++++++++++++++ > > .../dts/renesas/r9a09g056n48-rzv2n-evk.dts | 115 ++++++++ > > arch/arm64/configs/defconfig | 1 + > > drivers/clk/renesas/Kconfig | 5 + > > drivers/clk/renesas/Makefile | 1 + > > drivers/clk/renesas/r9a09g056-cpg.c | 152 ++++++++++ > > drivers/clk/renesas/rzv2h-cpg.c | 18 +- > > drivers/clk/renesas/rzv2h-cpg.h | 1 + > > drivers/pinctrl/renesas/Kconfig | 1 + > > drivers/pinctrl/renesas/pinctrl-rzg2l.c | 36 ++- > > drivers/soc/renesas/Kconfig | 10 + > > drivers/soc/renesas/Makefile | 1 + > > drivers/soc/renesas/r9a09g056-sys.c | 107 +++++++ > > drivers/soc/renesas/rz-sysc.c | 3 + > > drivers/soc/renesas/rz-sysc.h | 1 + > > .../dt-bindings/clock/renesas,r9a09g056-cpg.h | 24 ++ > > .../pinctrl/renesas,r9a09g056-pinctrl.h | 30 ++ > > 24 files changed, 790 insertions(+), 10 deletions(-) > > create mode 100644 arch/arm64/boot/dts/renesas/r9a09g056.dtsi > > create mode 100644 arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts > > create mode 100644 drivers/clk/renesas/r9a09g056-cpg.c > > create mode 100644 drivers/soc/renesas/r9a09g056-sys.c > > create mode 100644 include/dt-bindings/clock/renesas,r9a09g056-cpg.h > > create mode 100644 include/dt-bindings/pinctrl/renesas,r9a09g056-pinctrl.h > > > > -- > > 2.49.0 > > > > > > > > > My bot found new DTB warnings on the .dts files added or changed in this > series. > > Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings > are fixed by another series. Ultimately, it is up to the platform > maintainer whether these warnings are acceptable or not. No need to reply > unless the platform maintainer has comments. > > If you already ran DT checks and didn't see these error(s), then > make sure dt-schema is up to date: > > pip3 install dtschema --upgrade > > > This patch series was applied (using b4) to base: > Base: attempting to guess base-commit... > Base: tags/next-20250326 (best guess, 15/18 blobs matched) > > If this is not the correct base, please add 'base-commit' tag > (or use b4 which does this automatically) > > New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/renesas/' for 20250326143945.82142-1-prabhakar.mahadev-lad.rj@...renesas.com: > > arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dtb: pinctrl@...10000: 'interrupt-controller' is a required property > from schema $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml# > arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dtb: pinctrl@...10000: '#interrupt-cells' is a required property > from schema $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml# > > As mentioned in patch 13/15 [0] the above warnings are expected this is because as part of the initial support, the ICU has not been added yet. The interrupt-related properties will be added to the pinctrl node along with ICU support. [0] https://lore.kernel.org/all/20250326143945.82142-14-prabhakar.mahadev-lad.rj@bp.renesas.com/ Cheers, Prabhakar
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