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Message-ID: <2025032514-ipad-schilling-9928@gregkh>
Date: Tue, 25 Mar 2025 20:45:29 -0400
From: Greg KH <gregkh@...uxfoundation.org>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: Raag Jadav <raag.jadav@...el.com>, Lee Jones <lee@...nel.org>,
	giometti@...eenne.com, raymond.tan@...el.com,
	linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/5] mfd: intel_ehl_pse_gpio: Introduce Intel Elkhart
 Lake PSE GPIO and TIO

On Fri, Mar 21, 2025 at 03:22:36PM +0200, Andy Shevchenko wrote:
> On Fri, Mar 21, 2025 at 06:04:38AM -0700, Greg KH wrote:
> > On Fri, Mar 21, 2025 at 07:28:22AM +0200, Raag Jadav wrote:
> > > On Fri, Mar 14, 2025 at 01:57:35PM +0000, Lee Jones wrote:
> > > > On Fri, 14 Mar 2025, Andy Shevchenko wrote:
> 
> ...
> 
> > > > Also, Greg has been quite vocal about converting PCI devices to Platform
> > > > ones in the past.  We may wish to run this past him before continuing.
> > > 
> > > Greg, any objections on moving forward with platform device?
> > 
> > I have no context here at all, why would a PCI device EVER be a platform
> > device?  That feels wrong on so many levels...
> 
> It's a multi-functional device, in other words that device provides a set of
> (dependent or independent) subdevices. But do you have other suggestion?
> The auxiliary bus?

Yes, that is exactly what the auxiliary bus code was designed and
written for.

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