linux-kernel - Re: [PATCH v8 00/16] Enable CXL PCIe port protocol error handling and logging

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Message-ID: <20250327171607.GA1434835@bhelgaas>
Date: Thu, 27 Mar 2025 12:16:07 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Terry Bowman <terry.bowman@....com>
Cc: linux-cxl@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org, nifan.cxl@...il.com, dave@...olabs.net,
	jonathan.cameron@...wei.com, dave.jiang@...el.com,
	alison.schofield@...el.com, vishal.l.verma@...el.com,
	dan.j.williams@...el.com, bhelgaas@...gle.com, mahesh@...ux.ibm.com,
	ira.weiny@...el.com, oohall@...il.com, Benjamin.Cheatham@....com,
	rrichter@....com, nathan.fontenot@....com,
	Smita.KoralahalliChannabasappa@....com, lukas@...ner.de,
	ming.li@...omail.com, PradeepVineshReddy.Kodamati@....com
Subject: Re: [PATCH v8 00/16] Enable CXL PCIe port protocol error handling
 and logging

On Wed, Mar 26, 2025 at 08:47:01PM -0500, Terry Bowman wrote:
> ...

> Terry Bowman (16):
>   PCI/CXL: Introduce PCIe helper function pcie_is_cxl()

Something like "Add pcie_is_cxl()" is probably enough.

>   PCI/AER: Modify AER driver logging to report CXL or PCIe bus error
>     type

No need to repeat "AER" in the subject.  Could start with "Report" or
"Distinguish" since "modify AER driver logging" is kind of low-value
information.

>   CXL/AER: Introduce Kfifo for forwarding CXL errors

>   cxl/aer: AER service driver forwards CXL error to CXL driver
>   PCI/AER: CXL driver dequeues CXL error forwarded from AER service
>     driver

Both should say what the patch changes.  "AER service driver forwards"
and "CXL driver dequeues" could be descriptions of existing behavior
or something else.  Starting with a verb will help make this clearer.

Maybe don't need to repeat "AER" in "CXL/AER: AER ..."

>   CXL/PCI: Introduce CXL uncorrectable protocol error 'recovery'
>   cxl/pci: Move existing CXL RAS initialization to CXL's cxl_port driver

Drop "existing" and at least one "CXL" to increase information density
in subject.

>   cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers
>   cxl/pci: Update RAS handler interfaces to also support CXL PCIe Ports
>   cxl/pci: Add log message if RAS registers are not mapped
>   cxl/pci: Unifi CXL trace logging for CXL Endpoints and CXL Ports

s/Unifi/Unify/

>   cxl/pci: Assign CXL Port protocol error handlers
>   cxl/pci: Assign CXL Endpoint protocol error handlers
>   cxl/pci: Remove unnecessary CXL Endpoint handling helper functions
>   CXL/PCI: Enable CXL protocol errors during CXL Port probe
>   CXL/PCI: Disable CXL protocol errors during CXL Port cleanup

Don't repost just for any of this, but it looks like there are some
kernel test robot warnings that need to be addressed.  When you do,
tidy up these subject lines so they are capitalized consistently.