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Message-Id:
<174304589524.1549280.4582301504340621621.git-patchwork-notify@kernel.org>
Date: Thu, 27 Mar 2025 03:24:55 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Inochi Amaoto <inochiama@...il.com>
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Subject: Re: [PATCH v3 0/3] riscv: Add bfloat16 instruction support
Hello:
This series was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@...osinc.com>:
On Fri, 6 Dec 2024 13:58:26 +0800 you wrote:
> Add description for the BFloat16 precision Floating-Point ISA extension,
> (Zfbfmin, Zvfbfmin, Zvfbfwma). which was ratified in commit 4dc23d62
> ("Added Chapter title to BF16") of the riscv-isa-manual.
>
> Changed from v2:
> 1. rebase for v6.13-rc1
>
> [...]
Here is the summary with links:
- [v3,1/3] dt-bindings: riscv: add bfloat16 ISA extension description
https://git.kernel.org/riscv/c/35bc1883733c
- [v3,2/3] riscv: add ISA extension parsing for bfloat16 ISA extension
(no matching commit)
- [v3,3/3] riscv: hwprobe: export bfloat16 ISA extension
https://git.kernel.org/riscv/c/a4863e002cf0
You are awesome, thank you!
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