linux-kernel - Re: [PATCH V2] riscv: Implement smp_cond

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Message-Id: 
 <174304591124.1549280.8617793475801522686.git-patchwork-notify@kernel.org>
Date: Thu, 27 Mar 2025 03:25:11 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Guo Ren <guoren@...nel.org>
Cc: linux-riscv@...ts.infradead.org, paul.walmsley@...ive.com,
 palmer@...belt.com, bjorn@...osinc.com, conor@...nel.org, leobras@...hat.com,
 alexghiti@...osinc.com, christoph.muellner@...ll.eu,
 linux-kernel@...r.kernel.org, parri.andrea@...il.com,
 ajones@...tanamicro.com, ericchancf@...gle.com, guoren@...ux.alibaba.com
Subject: Re: [PATCH V2] riscv: Implement smp_cond_load8/16() with Zawrs

Hello:

This patch was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@...osinc.com>:

On Mon, 16 Dec 2024 20:39:10 -0500 you wrote:
> From: Guo Ren <guoren@...ux.alibaba.com>
> 
> RISC-V code uses the queued spinlock implementation, which calls
> the macros smp_cond_load_acquire for one byte. So, complement the
> implementation of byte and halfword versions.
> 
> Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@...nel.org>
> Cc: Andrew Jones <ajones@...tanamicro.com>
> 
> [...]

Here is the summary with links:
  - [V2] riscv: Implement smp_cond_load8/16() with Zawrs
    https://git.kernel.org/riscv/c/d9708b1931fc

You are awesome, thank you!
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