[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <26463cdf-f041-0dc3-dae2-cf5a91a35373@quicinc.com>
Date: Thu, 27 Mar 2025 16:18:29 +0530
From: Kaushal Kumar <quic_kaushalk@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>, <vkoul@...nel.org>,
<robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<manivannan.sadhasivam@...aro.org>, <miquel.raynal@...tlin.com>,
<richard@....at>, <vigneshr@...com>, <andersson@...nel.org>,
<konradybcio@...nel.org>, <agross@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <dmaengine@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-mtd@...ts.infradead.org>
Subject: Re: [PATCH 4/6] ARM: dts: qcom: sdx75: Add QPIC NAND support
On 3/13/2025 8:06 PM, Konrad Dybcio wrote:
> On 3/13/25 2:09 PM, Kaushal Kumar wrote:
>> Add devicetree node to enable support for QPIC
>> NAND controller on Qualcomm SDX75 platform.
>> Since there is no "aon" clock in SDX75, a dummy
>> clock is provided.
> Alter the bindings not to require it then, instead
>
> [...]
Will update in v2.
>
>>
>> + qpic_nand: nand-controller@...8000 {
>> + compatible = "qcom,sdx75-nand", "qcom,sdx55-nand";
>> + reg = <0x0 0x01cc8000 0x0 0x10000>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + clocks = <&rpmhcc RPMH_QPIC_CLK>,
>> + <&nand_clk_dummy>;
>> + clock-names = "core", "aon";
>> +
>> + dmas = <&qpic_bam 0>,
>> + <&qpic_bam 1>,
>> + <&qpic_bam 2>;
>> + dma-names = "tx", "rx", "cmd";
> Please make dma-names a vertical list, just like dmas
Sure, will update in v2.
>
> Konrad
Powered by blists - more mailing lists