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Message-ID: <20250328105822.3946767-1-jensenhuang@friendlyarm.com>
Date: Fri, 28 Mar 2025 18:58:22 +0800
From: Jensen Huang <jensenhuang@...endlyarm.com>
To: Shawn Lin <shawn.lin@...k-chips.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Heiko Stuebner <heiko@...ech.de>,
Philipp Zabel <p.zabel@...gutronix.de>,
Anand Moon <linux.amoon@...il.com>
Cc: Jensen Huang <jensenhuang@...endlyarm.com>,
Krzysztof Wilczyński <kwilczynski@...nel.org>,
linux-pci@...r.kernel.org,
linux-rockchip@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] PCI: rockchip: Fix order of rockchip_pci_core_rsts
The order of rockchip_pci_core_rsts follows the previous comments suggesting
to avoid reordering. However, reset_control_bulk_deassert() applies resets in
reverse, which may lead to the link downgrading to 2.5 GT/s.
This patch restores the deassert order and comments for core_rsts, introduced in
commit 58c6990c5ee7 ("PCI: rockchip: Improve the deassert sequence of four reset pins").
Tested on NanoPC-T4 with Samsung 970 Pro.
Fixes: 18715931a5c0 ("PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function")
Signed-off-by: Jensen Huang <jensenhuang@...endlyarm.com>
---
drivers/pci/controller/pcie-rockchip.h | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index 11def598534b..4f63a03d535c 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -320,11 +320,15 @@ static const char * const rockchip_pci_pm_rsts[] = {
"aclk",
};
+/*
+ * Please don't reorder the deassert sequence of the following
+ * four reset pins.
+ */
static const char * const rockchip_pci_core_rsts[] = {
- "mgmt-sticky",
- "core",
- "mgmt",
"pipe",
+ "mgmt",
+ "core",
+ "mgmt-sticky",
};
struct rockchip_pcie {
--
2.49.0-1
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