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Message-ID: <20250329121258.172099-2-john.madieu.xa@bp.renesas.com>
Date: Sat, 29 Mar 2025 13:12:56 +0100
From: John Madieu <john.madieu.xa@...renesas.com>
To: john.madieu.xa@...renesas.com,
conor+dt@...nel.org,
geert+renesas@...der.be,
krzk+dt@...nel.org,
magnus.damm@...il.com,
robh@...nel.org
Cc: biju.das.jz@...renesas.com,
devicetree@...r.kernel.org,
john.madieu@...il.com,
linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org
Subject: [PATCH 1/2] arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol
Add device node for i2c2 pincontrol. Also enable i2c2 device node on dtsi
with 1MHz clock frequency as it is connected to PMIC raa215300 on RZ/G3E
SoM.
Signed-off-by: John Madieu <john.madieu.xa@...renesas.com>
---
arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
index 72b42a81bcf3..ca56a9edda2e 100644
--- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
@@ -18,6 +18,7 @@ / {
compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047";
aliases {
+ i2c2 = &i2c2;
mmc0 = &sdhi0;
mmc2 = &sdhi2;
};
@@ -51,7 +52,19 @@ &audio_extal_clk {
clock-frequency = <48000000>;
};
+&i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+ clock-frequency = <1000000>;
+ status = "okay";
+};
+
&pinctrl {
+ i2c2_pins: i2c {
+ pinmux = <RZG3E_PORT_PINMUX(3, 4, 1)>, /* SCL2 */
+ <RZG3E_PORT_PINMUX(3, 5, 1)>; /* SDA2 */
+ };
+
sdhi0_emmc_pins: sd0-emmc {
sd0-ctrl {
pins = "SD0CLK", "SD0CMD";
--
2.25.1
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