linux-kernel - Re: [PATCH v2 1/2] dt-bindings: timer: Add NXP System Timer Module

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <a81c615a-a1f5-4dfc-81ce-6235abed0820@kernel.org>
Date: Sat, 29 Mar 2025 06:03:59 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Daniel Lezcano <daniel.lezcano@...aro.org>, tglx@...utronix.de
Cc: linux-kernel@...r.kernel.org, thomas.fossati@...aro.org,
 Larisa.Grigore@....com, ghennadi.procopciuc@....com, S32@....com,
 Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Maxime Coquelin <mcoquelin.stm32@...il.com>,
 Alexandre Torgue <alexandre.torgue@...s.st.com>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@...r.kernel.org>,
 "moderated list:ARM/STM32 ARCHITECTURE"
 <linux-stm32@...md-mailman.stormreply.com>,
 "moderated list:ARM/STM32 ARCHITECTURE"
 <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 1/2] dt-bindings: timer: Add NXP System Timer Module

On 28/03/2025 14:42, Daniel Lezcano wrote:
> Add the System Timer Module description found on the NXP s32 platform
> and the compatible for the s32g2 variant.
> 
> Cc: Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Cc: Thomas Fossati <thomas.fossati@...aro.org>
> Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
> ---

I got only this patch, no cover letter, no changelog. What happened here?

>  .../bindings/timer/nxp,stm-timer.yaml         | 50 +++++++++++++++++++
>  1 file changed, 50 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml
> 
> diff --git a/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml b/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml
> new file mode 100644
> index 000000000000..a9c0151d62be
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/nxp,stm-timer.yaml

Filename following compatible.

> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/nxp,stm-timer.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP System Timer Module (STM)
> +
> +maintainers:
> +  - Daniel Lezcano <daniel.lezcano@...nel.org>
> +
> +description:
> +  The System Timer Module supports commonly required system and application
> +  software timing functions. STM includes a 32-bit count-up timer and four
> +  32-bit compare channels with a separate interrupt source for each channel.
> +  The timer is driven by the STM module clock divided by an 8-bit prescale
> +  value.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - nxp,s32g-stm

Previously it was told to me there is no such soc as s32g but they are
named differently, e.g. s32g2. See other bindings.

Please consult internally and come with one unified approach to all NXP
bindings. Otherwise, if this is a real soc, fix this for top level
compatibles, because there is no s32g there either.

This applies to all NXP-related patches (which I am sure was previously
discussed on the lists).

What is confusing: previous compatible was correct and I did not ask to
change it.

Best regards,
Krzysztof