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Message-ID: <20250331171857.262649-1-wthai@nvidia.com>
Date: Mon, 31 Mar 2025 17:18:57 +0000
From: Willie Thai <wthai@...dia.com>
To: <andrew@...econstruct.com.au>
CC: <conor+dt@...nel.org>, <devicetree@...r.kernel.org>,
<dkodihalli@...dia.com>, <gpiccoli@...lia.com>, <joel@....id.au>,
<kees@...nel.org>, <krzk+dt@...nel.org>, <leohu@...dia.com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-aspeed@...ts.ozlabs.org>,
<linux-hardening@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<openbmc@...ts.ozlabs.org>, <robh@...nel.org>, <tingkaic@...dia.com>,
<tony.luck@...el.com>, <wthai@...dia.com>, <harrys@...dia.com>
Subject: Re: Re: [PATCH v4 2/3] dt-bindings: pinctrl: aspeed,ast2600-pinctrl
>> Add EMMCG5 enum to compatible list of pinctrl binding for emmc
>> enabling.
>>
>> Cc: Andrew Jeffery <andrew@...econstruct.com.au>
>> Signed-off-by: Willie Thai <wthai@...dia.com>
>> ---
>> .../devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml | 1
>> +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git
>> a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-
>> pinctrl.yaml
>> b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-
>> pinctrl.yaml
>> index 80974c46f3ef..cb75e979f5e0 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-
>> pinctrl.yaml
>> +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-
>> pinctrl.yaml
>> @@ -276,6 +276,7 @@ additionalProperties:
>> - BMCINT
>> - EMMCG1
>> - EMMCG4
>> + - EMMCG5
>
> What pin configuration does this correspond to for the eMMC controller?
> These groups aren't arbitrary, they correspond to the 1, 4 and 8-bit
> bus modes.
>
> You may have added this squash a warning, but I suspect the pinctrl
> configuration in your devicetree is incorrect.
>
> Andrew
>
Thanks for your feedback !
We want to exclude AC5 pin in the default EMMCG4 pin group, because that pin is used for other purpose.
We define a new group called EMMCG5 as:
GROUP_DECL(EMMCG5, AB4, AA4, AC4, AA5, Y5, AB5, AB6)
The bus mode is still 4-bit mode.
Could you please advise if we can use the name "EMMCG5" ?
>> - EMMCG8
>> - ESPI
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