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Message-ID: <20250331215720.19692-2-alex.vinarskis@gmail.com>
Date: Mon, 31 Mar 2025 23:53:35 +0200
From: Aleksandrs Vinarskis <alex.vinarskis@...il.com>
To: Bjorn Andersson <andersson@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
	Dmitry Baryshkov <lumag@...nel.org>,
	Aleksandrs Vinarskis <alex.vinarskis@...il.com>,
	Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Abel Vesa <abel.vesa@...aro.org>,
	Johan Hovold <johan+linaro@...nel.org>,
	linux-arm-msm@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-usb@...r.kernel.org
Cc: Konrad Dybcio <konradybcio@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Heikki Krogerus <heikki.krogerus@...ux.intel.com>
Subject: [PATCH v1 1/6] arm64: dts: qcom: move pcie6a type change from X1P42100 to X1P42100-crd

It appears at least on some devices (Asus Zenbook A14, x1-26-100) change
of pcie6a_phy's compatible breaks the controller. Move compatible change
from generic x1p42100.dtsi to CRD's specific x1p42100-crd.dts instead.

Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@...il.com>
---
 arch/arm64/boot/dts/qcom/x1p42100-crd.dts | 4 ++++
 arch/arm64/boot/dts/qcom/x1p42100.dtsi    | 4 ----
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/x1p42100-crd.dts b/arch/arm64/boot/dts/qcom/x1p42100-crd.dts
index cf07860a63e9..a2a212b31556 100644
--- a/arch/arm64/boot/dts/qcom/x1p42100-crd.dts
+++ b/arch/arm64/boot/dts/qcom/x1p42100-crd.dts
@@ -15,3 +15,7 @@ / {
 	model = "Qualcomm Technologies, Inc. X1P42100 CRD";
 	compatible = "qcom,x1p42100-crd", "qcom,x1p42100";
 };
+
+&pcie6a_phy {
+	compatible = "qcom,x1p42100-qmp-gen4x4-pcie-phy";
+};
diff --git a/arch/arm64/boot/dts/qcom/x1p42100.dtsi b/arch/arm64/boot/dts/qcom/x1p42100.dtsi
index 27f479010bc3..4424a8708d39 100644
--- a/arch/arm64/boot/dts/qcom/x1p42100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1p42100.dtsi
@@ -37,10 +37,6 @@ &pcie3 {
 	num-lanes = <4>;
 };
 
-&pcie6a_phy {
-	compatible = "qcom,x1p42100-qmp-gen4x4-pcie-phy";
-};
-
 &soc {
 	/* The PCIe3 PHY on X1P42100 uses a different IP block */
 	pcie3_phy: phy@...4000 {
-- 
2.45.2


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