linux-kernel - RE: [PATCH 09/17] drm: renesas: rz-du: mipi

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Message-ID:
 <TY3PR01MB11346FE7A28E0377BA80B98FD86AD2@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Mon, 31 Mar 2025 12:28:11 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Prabhakar <prabhakar.csengg@...il.com>, Geert Uytterhoeven
	<geert+renesas@...der.be>, Andrzej Hajda <andrzej.hajda@...el.com>, Neil
 Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
	laurent.pinchart <laurent.pinchart@...asonboard.com>, Jonas Karlman
	<jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>, David Airlie
	<airlied@...il.com>, Simona Vetter <simona@...ll.ch>, Maarten Lankhorst
	<maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
	Mauro Carvalho Chehab <mchehab@...nel.org>, Kieran Bingham
	<kieran.bingham+renesas@...asonboard.com>, Stephen Boyd <sboyd@...nel.org>,
	Philipp Zabel <p.zabel@...gutronix.de>
CC: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
	"linux-media@...r.kernel.org" <linux-media@...r.kernel.org>,
	"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>, Fabrizio Castro
	<fabrizio.castro.jz@...esas.com>, Prabhakar Mahadev Lad
	<prabhakar.mahadev-lad.rj@...renesas.com>
Subject: RE: [PATCH 09/17] drm: renesas: rz-du: mipi_dsi: Simplify HSFREQ
 calculation

Hi Prabhakar,

Thanks for the patch.

> -----Original Message-----
> From: Prabhakar <prabhakar.csengg@...il.com>
> Sent: 30 March 2025 22:07
> Subject: [PATCH 09/17] drm: renesas: rz-du: mipi_dsi: Simplify HSFREQ calculation
> 
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> 
> Simplify the high-speed clock frequency (HSFREQ) calculation by removing the redundant multiplication
> and division by 8. The updated equation:
> 
>     hsfreq = (mode->clock * bpp) / (dsi->lanes);
> 
> produces the same result while improving readability and clarity.
> 
> Additionally, update the comment to clarify the relationship between HS clock bit frequency, HS byte
> clock frequency, and HSFREQ.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Reviewed-by: Biju Das <biju.das.jz@...renesas.com>

Cheers,
Biju

> ---
>  drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-
> du/rzg2l_mipi_dsi.c
> index c6f60b7f203b..746f82442c01 100644
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> @@ -277,10 +277,10 @@ static int rzg2l_mipi_dsi_startup(struct rzg2l_mipi_dsi *dsi,
>  	 *       hsclk: DSI HS Byte clock frequency (Hz)
>  	 *       lanes: number of data lanes
>  	 *
> -	 * hsclk(bit) = hsclk(byte) * 8
> +	 * hsclk(bit) = hsclk(byte) * 8 = hsfreq
>  	 */
>  	bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
> -	hsfreq = (mode->clock * bpp * 8) / (8 * dsi->lanes);
> +	hsfreq = (mode->clock * bpp) / dsi->lanes;
> 
>  	ret = pm_runtime_resume_and_get(dsi->dev);
>  	if (ret < 0)
> --
> 2.49.0