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Message-ID: <Z+qkrZcYbhdAVL3r@MiWiFi-R3L-srv>
Date: Mon, 31 Mar 2025 22:20:29 +0800
From: Baoquan He <bhe@...hat.com>
To: Ingo Molnar <mingo@...nel.org>
Cc: akpm@...ux-foundation.org, linux-mm@...ck.org,
linux-kernel@...r.kernel.org, yanjun.zhu@...ux.dev, x86@...nel.org
Subject: Re: [PATCH v2 6/7] x86/mm: remove p4d_leaf definition
On 03/31/25 at 11:57am, Ingo Molnar wrote:
>
> * Baoquan He <bhe@...hat.com> wrote:
>
> > There's no p4d huge page support yet, let's use the generic definition.
> >
> > And also update the BUILD_BUG_ON() in pti_user_pagetable_walk_pmd()
> > because p4d_leaf() returns boolean value.
Thanks a lot for cleaning up the patch logs and rearranging x86 patches
into tip tree.
>
>
> > -#define p4d_leaf p4d_leaf
> > -static inline bool p4d_leaf(p4d_t p4d)
> > -{
> > - /* No 512 GiB pages yet */
> > - return 0;
> > -}
>
> This comment was also incorrect I believe:
>
> 1 PTE entry on x86-64 covers 4K virtual memory, 512 PTE entries make up
> a 4K pagetable page, and each level of paging adds another level of 512
> pagetable entries:
>
> - level 0: 4K pages
> - level 1: 512x 4K = 2MB 'large' pages
> - level 2: 512x 2MB = 1GB 'huge' pages
> - level 3: 512x 1GB = 512GB 'PGD' pages
> - level 4: 512x 512GB = 256TB 'P4D' pages
>
> So the above comment should have said '256 TB' pages, unless there's
> some naming weirdness I missed.
Hmm, there could be misunderstanding here. In 5-level paging, PGD is the
highest level, P4D is the next level of PGD. You may have reversed their
order. So one P4D entry maps one PUD table which is 512 x 1GB. Then the
mentioned comment seems correct to me.
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