linux-kernel - Re: [PATCH 08/15] dt-bindings: clock: renesas: Document RZ/V2N SoC CPG

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <174343098722.2720962.4671608983688904024.robh@kernel.org>
Date: Mon, 31 Mar 2025 09:23:07 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Michael Turquette <mturquette@...libre.com>,
	Catalin Marinas <catalin.marinas@....com>,
	linux-arm-kernel@...ts.infradead.org, linux-mmc@...r.kernel.org,
	Wolfram Sang <wsa+renesas@...g-engineering.com>,
	Stephen Boyd <sboyd@...nel.org>, linux-serial@...r.kernel.org,
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
	Magnus Damm <magnus.damm@...il.com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
	linux-renesas-soc@...r.kernel.org, linux-gpio@...r.kernel.org,
	Krzysztof Kozlowski <krzk+dt@...nel.org>, linux-clk@...r.kernel.org,
	devicetree@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Jiri Slaby <jirislaby@...nel.org>,
	Ulf Hansson <ulf.hansson@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>, linux-kernel@...r.kernel.org,
	Will Deacon <will@...nel.org>
Subject: Re: [PATCH 08/15] dt-bindings: clock: renesas: Document RZ/V2N SoC
 CPG


On Wed, 26 Mar 2025 14:39:38 +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> 
> Document the device tree bindings for the Renesas RZ/V2N (R9A09G056)
> SoC Clock Pulse Generator (CPG).
> 
> Update `renesas,rzv2h-cpg.yaml` to include the compatible string for
> RZ/V2N SoC and adjust the title and description accordingly.
> 
> Additionally, introduce `renesas,r9a09g056-cpg.h` to define core clock
> constants for the RZ/V2N SoC. Note the existing RZ/V2H(P) family-specific
> clock driver will be reused for this SoC.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
>  .../bindings/clock/renesas,rzv2h-cpg.yaml     |  5 ++--
>  .../dt-bindings/clock/renesas,r9a09g056-cpg.h | 24 +++++++++++++++++++
>  2 files changed, 27 insertions(+), 2 deletions(-)
>  create mode 100644 include/dt-bindings/clock/renesas,r9a09g056-cpg.h
> 

Acked-by: Rob Herring (Arm) <robh@...nel.org>