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Message-ID: <dbf181f0-076f-43e8-aa09-88a8a13ae307@linux.intel.com>
Date: Tue, 1 Apr 2025 11:43:39 -0400
From: "Liang, Kan" <kan.liang@...ux.intel.com>
To: Wentao Liang <vulab@...as.ac.cn>, peterz@...radead.org, mingo@...hat.com,
acme@...nel.org, namhyung@...nel.org, mark.rutland@....com,
alexander.shishkin@...ux.intel.com, jolsa@...nel.org, irogers@...gle.com,
adrian.hunter@...el.com, tglx@...utronix.de, bp@...en8.de,
dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com
Cc: linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
stable@...r.kernel.org
Subject: Re: [PATCH] perf/x86/intel/uncore: Add error handling for
uncore_msr_box_ctl()
On 2025-04-01 10:17 a.m., Wentao Liang wrote:
> In mtl_uncore_msr_init_box(), the return value of uncore_msr_box_ctl()
> needs to be checked before being used as the parameter of wrmsrl().
> A proper implementation can be found in ivbep_uncore_msr_init_box().
>
> Add error handling for uncore_msr_box_ctl() to ensure the MSR write
> operation is only performed when a valid MSR address is returned.
>
> Fixes: c828441f21dd ("perf/x86/intel/uncore: Add Meteor Lake support")
> Cc: stable@...r.kernel.org # v6.3+
> Signed-off-by: Wentao Liang <vulab@...as.ac.cn>
Reviewed-by: Kan Liang <kan.liang@...ux.intel.com>
Thanks,
Kan> ---
> arch/x86/events/intel/uncore_snb.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c
> index 3934e1e4e3b1..84070388f495 100644
> --- a/arch/x86/events/intel/uncore_snb.c
> +++ b/arch/x86/events/intel/uncore_snb.c
> @@ -691,7 +691,10 @@ static struct intel_uncore_type mtl_uncore_hac_cbox = {
>
> static void mtl_uncore_msr_init_box(struct intel_uncore_box *box)
> {
> - wrmsrl(uncore_msr_box_ctl(box), SNB_UNC_GLOBAL_CTL_EN);
> + unsigned int msr = uncore_msr_box_ctl(box);
> +
> + if (msr)
> + wrmsrl(msr, SNB_UNC_GLOBAL_CTL_EN);
> }
>
> static struct intel_uncore_ops mtl_uncore_msr_ops = {
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