linux-kernel - Re: [PATCH v2] net: mdio: mux-meson-gxl: set 28th bit in eth

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CACdvmAgP8iftcUumv9RrHBLLHFtQtPeRVgDVp7YkWuPsW6Ybmg@mail.gmail.com>
Date: Mon, 31 Mar 2025 22:44:05 -0400
From: Da Xue <da@...sconfused.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: Andrew Lunn <andrew@...n.ch>, Neil Armstrong <neil.armstrong@...aro.org>, 
	Martin Blumenstingl <martin.blumenstingl@...glemail.com>, Kevin Hilman <khilman@...libre.com>, 
	linux-kernel@...r.kernel.org, stable@...r.kernel.org, 
	Da Xue <da@...re.computer>, Eric Dumazet <edumazet@...gle.com>, netdev@...r.kernel.org, 
	Jerome Brunet <jbrunet@...libre.com>, Jakub Kicinski <kuba@...nel.org>, 
	linux-amlogic@...ts.infradead.org, Paolo Abeni <pabeni@...hat.com>, 
	"David S . Miller" <davem@...emloft.net>, linux-arm-kernel@...ts.infradead.org, 
	Heiner Kallweit <hkallweit1@...il.com>
Subject: Re: [PATCH v2] net: mdio: mux-meson-gxl: set 28th bit in eth_reg2

On Mon, Mar 31, 2025 at 7:59 PM Russell King (Oracle)
<linux@...linux.org.uk> wrote:
>
> On Mon, Mar 31, 2025 at 05:21:08PM -0400, Da Xue wrote:
> > I found this on the zircon kernel:
> >
> > #define REG2_ETH_REG2_REVERSED (1 << 28)
> >
> > pregs->Write32(REG2_ETH_REG2_REVERSED | REG2_INTERNAL_PHY_ID, PER_ETH_REG2);
> >
> > I can respin and call it that.
>
> Which interface mode is being used, and what is the MAC connected to?
>
> "Reversed" seems to imply that _this_ end is acting as a PHY rather
> than the MAC in the link, so I think a bit more information (the above)
> is needed to ensure that this is the correct solution.

The SoC can be connected to an external PHY or use the internal PHY.
In this gxl_enable_internal_mdio case, we are using the internal PHY.

Sorry about leaving this out in the last email and causing another RT.
I'm not very familiar with ethernet underpinnings so I don't want to
use the wrong terms.


>
> --
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!