lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAMC_AXXPKsat846r==J_OYQA2j8kT-kZriuSqoH3F_nYEN8ATg@mail.gmail.com>
Date: Mon, 31 Mar 2025 18:47:55 -0700
From: Jon Pan-Doh <pandoh@...gle.com>
To: Karolina Stolarek <karolina.stolarek@...cle.com>
Cc: linux-pci@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>, 
	Terry Bowman <terry.bowman@....com>, Len Brown <lenb@...nel.org>, 
	James Morse <james.morse@....com>, Tony Luck <tony.luck@...el.com>, 
	Borislav Petkov <bp@...en8.de>, Ben Cheatham <Benjamin.Cheatham@....com>, 
	Ira Weiny <ira.weiny@...el.com>, Shuai Xue <xueshuai@...ux.alibaba.com>, 
	Liu Xinpeng <liuxp11@...natelecom.cn>, Darren Hart <darren@...amperecomputing.com>, 
	Dan Williams <dan.j.williams@...el.com>, linux-cxl@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] PCI/AER: Consolidate CXL, ACPI GHES and native AER
 reporting paths

On Tue, Mar 25, 2025 at 8:08 AM Karolina Stolarek
<karolina.stolarek@...cle.com> wrote:
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index a1cf8c7ef628..ec34bc9b2332 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -760,47 +760,42 @@ int cper_severity_to_aer(int cper_severity)
>  EXPORT_SYMBOL_GPL(cper_severity_to_aer);
>  #endif
>
> -void pci_print_aer(struct pci_dev *dev, int aer_severity,
> -                  struct aer_capability_regs *aer)
> +static void populate_aer_err_info(struct aer_err_info *info, int severity,
> +                                 struct aer_capability_regs *aer_regs)
>  {
> [...]
> +       if (severity == AER_CORRECTABLE) {
> +               info->id = aer_regs->cor_err_source;
> +               info->status = aer_regs->cor_status;
> +               info->mask = aer_regs->cor_mask;
> +       } else {
> +               info->id = aer_regs->uncor_err_source;

info->id isn't filled in pci_print_aer(). Is the addition due to
aer_print_error() having a conditional/log for info->id == id? From a
brief look at the code, FW-first (e.g. errors from GHES), I think it
will always be true. However, that doesn't always seem to be the case
for CXL (e.g. when cxl_dev_state.rcd == true).

Disclaimer: not a CXL/GHES expert though.

> +void aer_print_platform_error(struct pci_dev *pdev, int severity,
> +                             struct aer_capability_regs *aer_regs)

I like the encapsulation.

Reviewed-by: Jon Pan-Doh <pandoh@...gle.com>

Thanks,
Jon

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ