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Message-ID: <20250402011832.2970072-1-yabinc@google.com>
Date: Tue, 1 Apr 2025 18:18:29 -0700
From: Yabin Cui <yabinc@...gle.com>
To: Suzuki K Poulose <suzuki.poulose@....com>, Mike Leach <mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Yabin Cui <yabinc@...gle.com>
Subject: [PATCH v2 0/3] coresight: catu: Introduce refcount and spinlock for enabling/disabling
Hi Coresight maintainers,
When tracing ETM data on multiple CPUs concurrently via the
perf interface, the CATU device is shared across different CPU
paths. This can lead to race conditions when multiple CPUs attempt
to enable or disable the CATU device simultaneously. This patchset
is to fix race conditions when enabling/disabling a CATU device.
Changes since v1:
- Use raw_spinlock_t and guard().
- Add a patch to check enabled mode.
- Add a patch to disable helpers when fails to enable a device.
Yabin Cui (3):
coresight: catu: Introduce refcount and spinlock for
enabling/disabling
coresight: catu: Prevent concurrent PERF and SYSFS mode enablement
coresight: core: Disable helpers for devices that fail to enable
drivers/hwtracing/coresight/coresight-catu.c | 33 ++++++++++++++------
drivers/hwtracing/coresight/coresight-catu.h | 2 ++
drivers/hwtracing/coresight/coresight-core.c | 12 +++----
3 files changed, 30 insertions(+), 17 deletions(-)
--
2.49.0.472.ge94155a9ec-goog
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