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Message-ID: <CAHk-=whch6fMKH8FadOigqm_xrXfgWJyn=jz32GM6tUuM=nqvg@mail.gmail.com>
Date: Thu, 3 Apr 2025 09:47:51 -0700
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Herbert Xu <herbert@...dor.apana.org.au>
Cc: rostedt@...dmis.org, linux-kernel@...r.kernel.org, 
	linux-trace-kernel@...r.kernel.org, mhiramat@...nel.org, mark.rutland@....com, 
	mathieu.desnoyers@...icios.com, akpm@...ux-foundation.org, 
	vdonnefort@...gle.com, vbabka@...e.cz, rppt@...nel.org, kees@...nel.org, 
	tony.luck@...el.com, gpiccoli@...lia.com, linux-hardening@...r.kernel.org, 
	willy@...radead.org, Eric Biggers <ebiggers@...nel.org>, 
	Michael Ellerman <mpe@...erman.id.au>
Subject: Re: [PATCH v2 1/2] tracing: ring-buffer: Have the ring buffer code do
 the vmap of physical memory

On Wed, 2 Apr 2025 at 23:00, Herbert Xu <herbert@...dor.apana.org.au> wrote:
>
> There is no fallback implementation of flush_dcache_range for the
> architectures that don't need it.

Yeah, that literally looks like an oversight.

Probably because nobody needed it - or people didn't realize it was an
option and did the "loop over each page by hand" as in your example.

So yeah, I think it would be good to just expose flush_dcache_range()
as a dummy empty function in <asm-generic/cacheflush.h>, with the
usual "if the architecture defines this, that will override it" rule.

However, part of the problem is likely just unclear semantics. Because
the existing flush_cache_range() is about pure virtual caches and how
they need to be flushed before the TLB is flushed.

Also about D$ aliasing, but there isn't necessarily any TLB issues.

Honestly, I'd personally be perfectly fine saying "nobody sane cares,
and if your D$ isn't coherent, your perf mmap won't work".

                Linus

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