linux-kernel - Re: [PATCH RFC] arm64: vdso: Use __arch_counter_get

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Message-ID: <871pu9yvlb.wl-maz@kernel.org>
Date: Thu, 03 Apr 2025 18:59:44 +0100
From: Marc Zyngier <maz@...nel.org>
To: Breno Leitao <leitao@...ian.org>
Cc: Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	arnd@...db.de,
	kernel-team@...a.com,
	vincenzo.frascino@....com,
	anders.roxell@...aro.org,
	ndecarli@...a.com,
	rmikey@...a.com
Subject: Re: [PATCH RFC] arm64: vdso: Use __arch_counter_get_cntvct()

On Thu, 03 Apr 2025 13:14:49 +0100,
Breno Leitao <leitao@...ian.org> wrote:
> 
> Since you created *all* this noise regarding instruction ordering, can
> I pick your brain in the same topic? :-P
> 
> If my machine has Speculation Barrier (sb)[1] support, is it a good
> replacement for `isb` ? Do you happen to know?

Probably not. SB prevent speculation past it, while ISB is here to
enforce ordering. We're pretty happy to let the CPU speculate the
counter, as long as it does it the order we have defined.

On some implementation, this can be have a similar effect (drain the
fetch queue, restart). But the intent clearly isn't the same, and some
implementations may do things differently.

In any case, what you want is CNTVCTSS_EL0 (part of FEAT_ECV), which
does away with all barriers.

	M.

-- 
Jazz isn't dead. It just smells funny.