Message-ID: <pzqfq3w3phov244vnuxpl3t3bololdb3uqyx25ekvg3wzvbco3@jrokyjyc57fl>
Date: Thu, 3 Apr 2025 10:35:48 +0200
From: Jorge Marques <gastmaier@...il.com>
To: David Lechner <dlechner@...libre.com>
Cc: Jonathan Cameron <jic23@...nel.org>, 
	Jorge Marques <jorge.marques@...log.com>, Lars-Peter Clausen <lars@...afoo.de>, 
	Michael.Hennerich@...log.com, linux-iio@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] Documentation: ABI: add oversampling frequency in
 sysfs-bus-iio

On Wed, Apr 02, 2025 at 03:27:51PM -0500, David Lechner wrote:
> On 4/2/25 8:47 AM, Jorge Marques wrote:
> > On Sun, Mar 30, 2025 at 06:53:53PM +0100, Jonathan Cameron wrote:
> >> On Sun, 30 Mar 2025 12:34:39 -0500
> >> David Lechner <dlechner@...libre.com> wrote:
> >>
> >>> On 3/30/25 12:13 PM, Jonathan Cameron wrote:
> >>>> On Fri, 21 Mar 2025 15:50:02 +0100
> >>>> Jorge Marques <jorge.marques@...log.com> wrote:
> 
> Once you dig into it, the current situation is even more complicated than
> I expected. :-o
> 
> This reply has ended up being mostly a brain dump of my observations. I hope
> it isn't too confusing. Consider this more of a brainstorm on a future
> documentation page on sampling rates rather than commenting on what to do
> on this particular patch. :-)
> 
> ---
> 
> To make sure we are clear, I think we need to define some precise terminology,
> especially with regard to "sample rate" since that can be used to mean a
> lot of different things.
> 
> There is the "IIO sample rate" (could also call it the "effective sample rate")
> that is the rate that we push one complete set of data to an IIO buffer. In
> many cases, this would be the frequency of the hrtimer trigger that is configured
> as the trigger for the iio:deviceX.

Yes.

> 
> On the other end of the spectrum, we have the "conversion rate" which is the
> rate that individual ADC conversions can happen.

Yes.

> 
> What I had not seen before, but now I see in existing drivers, is that these
> may actually be completely independent. In other words, the hrtimer trigger
> only triggers reading the most recent set of conversions and conversions are
> driven by a completely separate trigger, generally some sort of clock in the
> ADC itself.
> 
> So I think we should expand the diagrams below to show more layers for the
> completely general case.
> 
> >>>>   
> >>>>> Some devices have an internal clock used to space out the conversion
> >>>>> trigger for the oversampling filter,
> >>>>> Consider an ADC with conversion and data ready pins topology:
> >>>>>
> >>>>>   Sampling trigger |       |       |       |       |
> >>>>>   ADC conversion   ++++    ++++    ++++    ++++    ++++
> >>>>>   ADC data ready      *       *       *       *       *
> >>>>>
> 
> For terminology, let's call this "burst mode" oversampling (maybe also
> referred to as "triggered mode" in some data sheets).
> 
> >>>>> With the oversampling frequency, conversions can be evenly space between
> >>>>> the sampling edge:  
> >>>>
> >>>> I'm not sure what this second example is providing.  Are you suggesting
> >>>> that if we don't provide oversampling frequency we should assume this
> >>>> pattern?  i.e. it is the default?
> >>>>   
> > 
> > The default is to do the n-conversions sequentially (n*t_conv),
> > "left-aligned" as in the diagram above.
> > The main application for oversampling is to average out the noise over a wider
> > bandwidth.
> > 
> > I looked into some of the drivers with oversampling and the supported devices
> > datasheets:
> > 
> > * ADS1298: Single field for sampling rate and oversampling,
> >            I assume the values are the maximum values that the
> > 	   oversampling time does not exceed the sampling period.
> > * RTQ6056: Field for oversampling and conversion time,
> >            maximum sampling period is roughly n*t_ovr.
> > * MCP3561: Field for oversampling and conversion time.
> >            maximum sampling period is roughly n*t_ovr.
> > * AD7380:  Field for oversampling and fixed conversion time,
> >            3 MSPS for the AD7380 and 4 MSPS for AD7381,
> >            maximum sampling period is n*t_ovr, e.g. f_samp=(6/4MSPS).
> > 
> > None will or claim to stretch over the sampling period the oversampling
> > conversions, but rather, do the n-conversions at oversampling rate,
> > providing the conversion as soon as it is ready and idling until the
> > next edge of the sampling frequency.
> > 
> >>>>>
> >>>>>   Sampling trigger |       |       |       |       |
> >>>>>   ADC conversion   + + + + + + + + + + + + + + + + + + + +
> >>>>>   ADC data ready         *       *       *       *       *
> >>>>> 
> 
> And let's call this one "continuous mode".
> 
> But as we will see, both of these are a bit ambiguous in their current
> form. The complete picture is a bit more nuanced.
> 
> ---
> 
> Let's take the RTQ6056 case (since I actually looked at that one before
> as inspiration for developing another driver).
> 
> The chip itself is programmable and can operate in either a burst/triggered
> mode or in a continuous mode. However, the way the IIO driver is implemented,
> it is configured in continuous mode to trigger ADC conversions. But uses an
> independent IIO trigger that triggers reading sample data. So from the point of
> view of the data in a buffered read, it looks like burst mode. But the value
> of the sampling_frequency attribute (the ADC device attribute, not the hrtimer
> trigger attribute) is for the hardware continuous mode.
> 
> Hardware:
> sampling_frequency   |       |       |       |       |
> ADC conversion       + + + + + + + + + + + + + + + + + + + +
> ADC data ready             *       *       *       *       *
> sample number              S0      S1      S2      S3      S4
> 
> IIO:
> hrtimer frequency               |                     |
> I2C read                         *                     *
> push to buffer                   S0                    S3
> 
> The IIO (hrtimer) trigger only reads the most recently available data, it
> doesn't trigger any conversion. The clocks are asynchronous.

That implementation sure works for low-speed converters where power-consuption
is not a concern.

> I think adding an oversampling_frequency attribute to this driver could make
> it easier to used/understand since oversampling_frequency would be exactly
> the "conversion rate". Compared to the current situation where the "conversion
> rate" is the sampling_frequency / oversampling_ratio.

I agree.
Applicable only for devices where sampling_frequency and
oversampling_frequency are detached.
Devices that provide a value for the fixed oversampling_frequency
frequency could have the attribute as read-only (e.g AD7380).

> 
> It is also interesting to consider that if someone decided to add SPI offload
> support to this driver, then there would be the possibility of using burst/
> trigggered mode or continuous mode and might want to support both even. In
> fact this is exactly the possibility we have with ad7606 that I mentioned in
> a previous reply. So we might even need an oversampling_mode attribute to allow
> selecting one or the other. But that is something to save for a ad7606 patch
> series.

For AD4052:

* iio raw read is the usual low-speed, CNV->DRDY->Read.
* iio buffer: uses offload, samp_freq is PWM node freq.
  - iio triggered buffer: not included on proposed series,
                          but doable as a fallback if offload
                          not available.
* iio events: monitor mode, device exits monitor mode on event
              (device specific behaviour, cannot be changed),
              the irq is propagated as iio event.

iio oversampling changes the iio raw and iio buffer readings behaviour
(takes longer to get a sample out).

> 
> ---
> 
> Another driver probably worth considering is ad4030. In this one, there is no
> internal clock to drive conversions. So, for oversampling, the sample rate is
> just "as fast as possible" (currently bit-banging a GPIO). So it doesn't actually
> have an oversampling frequency.
>
>
> If someone ever decided to hook it up to some hardware that could actually
> trigger a finite number of pulses at a specific rate, then this new attribute
> for oversampling_frequency would become useful. For this particular driver,
> the presence or absence of an oversampling_frequency attribute would have
> a meaning, but I don't think this generalizes to other ADCs.
> 

The hardware is the usual CNV trigger, so it is not really about hooking
up more hardware, but changing the behaviour
(takes n-CNV triggers to get a sample out).

The AD4052 also supports what you described, it is the "Averaging Mode" (p.31),
while the implemented uses the "Burst Averaging Mode" (p.32).
In the "Averaging Mode", effective sampling rate is
sampling_frequency / oversampling_ratio, while in
"Burst Averaging Mode" is sampling_frequency.

So, in "Burst Averaging Mode", the oversampling_frequency is *detached*
from sampling_frequency.

The driver could hide away the effective sampling frequency discrepancy
by reading the state and scaling sampling_frequency based on
oversampling_ratio, exactly like RTQ6056.

> ---
> 
> AD4695 is an interesting case to consider as well. When used without SPI offload
> support, we actually don't allow oversampling currently. If we did though, it
> be similar to the ad4030 in that we could either make it "as fast as possible"
> by banging a GPIO or the CS line depending on how the chip was wired up. Or it
> could use some specialized hardware to generate a pulse train to actually get
> a known conversion rate.
> 
> For now though, oversampling is only implemented when using a SPI offload.
> It works like this:
> 
> Channel		1   2       3 1   2       3 1   2       3
> OSR		2   4       1 2   4       1 2   4       1
> Trigger		| | | | | | | | | | | | | | | | | | | | |
> ADC Conversion	+ + + + + + + + + + + + + + + + + + + + +
> ADC data ready	   *       * *   *       * *   *       * *
> IIO sample                   S0            S1            S2
> 
> In this case, there isn't a "sample" trigger that triggers a burst of
> samples. Rather, there is only a "conversion" trigger that triggers
> individual conversion. In other words, we would call this "continuous mode".
> And it also shows that some chips allow individual channels to have
> different oversampling ratios.

I find this "continuous mode" name confusing, maybe stick with
"averaging mode", where each CNV pulse triggers a conversion and
"burst averaging mode", where a CNV pulse triggers a burst of
conversions.

> 
> In this case, it would be nice to have an oversampling_frequency
> attribute as well because it would exactly correspond to the conversion
> rate. Currently each channel has a sampling_frequency attribute that
> is oversampling_frequency / oversampling_ratio (same as RTQ6056).

I don't mind that, is the "hide away" I mentioned earlier.
I believe that, when oversampling is a driver feature,
oversampling_frequency is either:
 * The RW conversion frequency:
   - averaging mode:       oversampling_frequency, sampling_frequency,
                           and oversampling_ratio affect each other,
                           due to "hide away" logic.
                           One CNV one conversion.
   - burst averaging mode: sampling frequency and conversion frequency
                           are detached, doesn't need "hide away" logic.
                           One CNV one sample.
 * The RO conversion frequency with the role of maximum conversion frequency.

> 
> ---
> 
> So my conclusion here is that the new proposed oversampling_frequency
> attribute has nothing to do with "burst mode" or "continuous mode" it
> has the same meaning in both cases.

It depends if it is detached from sampling_frequency or not.
If the norm is to "hide away" with extra logic in "averaging mode",
they become interdependent.
If sampling frequency and conversion frequency are detached from each
other, oversampling_frequency for sure needs to exist.

>                                     It is effectively the rate for
> individual ADC conversions.
> 

Yes.

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