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Message-ID: <DB27EAFA-8793-4B0E-BC33-C9E9E2C41777@zytor.com>
Date: Sat, 05 Apr 2025 13:33:46 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Borislav Petkov <bp@...en8.de>, Kevin Koster <lkml@...ertech.com>,
Oerg866 <oerg866@...glemail.com>
CC: linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org
Subject: Re: [PATCH] x86/microcode: Fix crashes on early 486 CPUs due to usage of 'cpuid'.
On April 5, 2025 2:32:26 AM PDT, Borislav Petkov <bp@...en8.de> wrote:
>On Sat, Apr 05, 2025 at 01:03:06PM +1100, Kevin Koster wrote:
>> On Sat, 19 Oct 2024 08:29:04 +0200
>> Oerg866 <oerg866@...glemail.com> wrote:
>>
>> > Starting with v6.7-rc1, the kernel was no longer able to boot on early
>> > i486-class CPUs.
>>
>> Thanks for this patch! It solves my problem with kernel 6.12.11
>> rebooting at start-up on 486 CPUs, which had me puzzled. (tested on
>> AM486DX2-66 and CX486DX4-100)
>>
>> Is there a reason why the patch wasn't accepted?
>
>Yes, too many patches, too little time. :-(
>
>Anyway, does the one below - only build-tested - work for both y'all too?
>
>---
>diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
>index 695e569159c1..d53148fb893a 100644
>--- a/arch/x86/include/asm/microcode.h
>+++ b/arch/x86/include/asm/microcode.h
>@@ -17,10 +17,12 @@ struct ucode_cpu_info {
> void load_ucode_bsp(void);
> void load_ucode_ap(void);
> void microcode_bsp_resume(void);
>+bool __init microcode_loader_disabled(void);
> #else
> static inline void load_ucode_bsp(void) { }
> static inline void load_ucode_ap(void) { }
> static inline void microcode_bsp_resume(void) { }
>+bool __init microcode_loader_disabled(void) { return false; }
> #endif
>
> extern unsigned long initrd_start_early;
>diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
>index b61028cf5c8a..dda7f0d409e9 100644
>--- a/arch/x86/kernel/cpu/microcode/amd.c
>+++ b/arch/x86/kernel/cpu/microcode/amd.c
>@@ -1099,7 +1099,7 @@ static int __init save_microcode_in_initrd(void)
> enum ucode_state ret;
> struct cpio_data cp;
>
>- if (dis_ucode_ldr || c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10)
>+ if (microcode_loader_disabled() || c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10)
> return 0;
>
> if (!find_blobs_in_containers(&cp))
>diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
>index b3658d11e7b6..972338a2abae 100644
>--- a/arch/x86/kernel/cpu/microcode/core.c
>+++ b/arch/x86/kernel/cpu/microcode/core.c
>@@ -95,12 +95,15 @@ static bool amd_check_current_patch_level(void)
> return false;
> }
>
>-static bool __init check_loader_disabled_bsp(void)
>+bool __init microcode_loader_disabled(void)
> {
> static const char *__dis_opt_str = "dis_ucode_ldr";
> const char *cmdline = boot_command_line;
> const char *option = __dis_opt_str;
>
>+ if (!have_cpuid_p())
>+ return true;
>+
> /*
> * CPUID(1).ECX[31]: reserved for hypervisor use. This is still not
> * completely accurate as xen pv guests don't see that CPUID bit set but
>@@ -146,7 +149,7 @@ void __init load_ucode_bsp(void)
> return;
> }
>
>- if (check_loader_disabled_bsp())
>+ if (microcode_loader_disabled())
> return;
>
> if (intel)
>diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
>index de001b2146ab..f29dc9c95c50 100644
>--- a/arch/x86/kernel/head32.c
>+++ b/arch/x86/kernel/head32.c
>@@ -145,8 +145,7 @@ void __init __no_stack_protector mk_early_pgtbl_32(void)
> *ptr = (unsigned long)ptep + PAGE_OFFSET;
>
> #ifdef CONFIG_MICROCODE_INITRD32
>- /* Running on a hypervisor? */
>- if (native_cpuid_ecx(1) & BIT(31))
>+ if (microcode_loader_disabled())
> return;
>
> params = (struct boot_params *)__pa_nodebug(&boot_params);
>
How the Hades does c->x86 not get set to 4 (hence < 0x10) on this CPU?
That's the real bug imo...
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