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Message-ID: <20250406-hasty-saffron-flamingo-5c1dae@shite>
Date: Sun, 6 Apr 2025 14:35:23 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Crystal Guo <crystal.guo@...iatek.com>
Cc: Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Matthias Brugger <matthias.bgg@...il.com>, 
	AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org, 
	Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v4 1/2] dt-bindings: memory-controllers: Add MediaTek
 DRAM controller interface

On Thu, Apr 03, 2025 at 02:48:47PM GMT, Crystal Guo wrote:
> +maintainers:
> +  - Crystal Guo <crystal.guo@...iatek.com>
> +
> +description:
> +  A MediaTek DRAM controller interface to provide the current data rate of DRAM.

DRAM controller does not offer scaling? Or PHY/timing configuration?
This binding looks pretty incomplete.

> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - mediatek,mt8196-dramc
> +
> +  reg:
> +    items:
> +      - description: anaphy registers
> +      - description: ddrphy registers
> +
> +additionalProperties: false

If there is going to be any resend then this goes after required: block.

> +
> +required:
> +  - compatible
> +  - reg

Best regards,
Krzysztof


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