linux-kernel - [PATCH] arm64: dts: qcom: msm8953: Add uart

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Message-Id: <20250406-msm8953-uart_5-v1-1-7e4841674137@lucaweiss.eu>
Date: Sun, 06 Apr 2025 15:52:02 +0200
From: Luca Weiss <luca@...aweiss.eu>
To: ~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org, 
 Bjorn Andersson <andersson@...nel.org>, 
 Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, Felix Kaechele <felix@...chele.ca>, 
 Luca Weiss <luca@...aweiss.eu>
Subject: [PATCH] arm64: dts: qcom: msm8953: Add uart_5

From: Felix Kaechele <felix@...chele.ca>

Add the node and pinctrl for uart_5 found on the MSM8953 SoC.

Signed-off-by: Felix Kaechele <felix@...chele.ca>
[luca: Prepare patch for upstream submission]
Signed-off-by: Luca Weiss <luca@...aweiss.eu>
---
 arch/arm64/boot/dts/qcom/msm8953.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index af4c341e2533ef2cca593e0dc97003334d3fd6b7..3d6ab83cbce4696a8eb54b16fdb429e191f44637 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -767,6 +767,20 @@ spi_6_sleep: spi-6-sleep-state {
 				bias-disable;
 			};
 
+			uart_5_default: uart-5-default-state {
+				pins = "gpio16", "gpio17", "gpio18", "gpio19";
+				function = "blsp_uart5";
+				drive-strength = <16>;
+				bias-disable;
+			};
+
+			uart_5_sleep: uart-5-sleep-state {
+				pins = "gpio16", "gpio17", "gpio18", "gpio19";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
 			wcnss_pin_a: wcnss-active-state {
 
 				wcss-wlan2-pins {
@@ -1592,6 +1606,24 @@ blsp2_dma: dma-controller@...4000 {
 			qcom,controlled-remotely;
 		};
 
+		uart_5: serial@...f000 {
+			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+			reg = <0x07aef000 0x200>;
+			interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&gcc GCC_BLSP2_UART1_APPS_CLK>,
+				 <&gcc GCC_BLSP2_AHB_CLK>;
+			clock-names = "core",
+				      "iface";
+			dmas = <&blsp2_dma 0>, <&blsp2_dma 1>;
+			dma-names = "tx", "rx";
+
+			pinctrl-0 = <&uart_5_default>;
+			pinctrl-1 = <&uart_5_sleep>;
+			pinctrl-names = "default", "sleep";
+
+			status = "disabled";
+		};
+
 		i2c_5: i2c@...5000 {
 			compatible = "qcom,i2c-qup-v2.2.1";
 			reg = <0x07af5000 0x600>;

---
base-commit: a4cda136f021ad44b8b52286aafd613030a6db5f
change-id: 20250406-msm8953-uart_5-f663eed66041

Best regards,
-- 
Luca Weiss <luca@...aweiss.eu>