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Message-ID: <nxnqwh2mzvnxv5ytwjsyulxr6ct6mhv3z3v6q4ojrjhhclwv2i@55nb56hnwi3y>
Date: Sun, 6 Apr 2025 23:12:52 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Ayushi Makhija <quic_amakhija@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, robdclark@...il.com,
dmitry.baryshkov@...aro.org, sean@...rly.run,
marijn.suijten@...ainline.org, andersson@...nel.org, robh@...nel.org,
robh+dt@...nel.org, krzk+dt@...nel.org, konradybcio@...nel.org,
conor+dt@...nel.org, andrzej.hajda@...el.com,
neil.armstrong@...aro.org, rfoss@...nel.org,
Laurent.pinchart@...asonboard.com, jonas@...boo.se,
jernej.skrabec@...il.com, quic_abhinavk@...cinc.com,
quic_rajeevny@...cinc.com, quic_vproddut@...cinc.com,
quic_jesszhan@...cinc.com
Subject: Re: [PATCH v3 07/10] arm64: dts: qcom: sa8775p-ride: add anx7625 DSI
to DP bridge nodes
On Fri, Apr 04, 2025 at 05:25:36PM +0530, Ayushi Makhija wrote:
> Add anx7625 DSI to DP bridge device nodes.
>
> Signed-off-by: Ayushi Makhija <quic_amakhija@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 208 ++++++++++++++++++++-
> 1 file changed, 207 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
> index 175f8b1e3b2d..8e784ccf4138 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
> @@ -28,6 +28,13 @@ chosen {
> stdout-path = "serial0:115200n8";
> };
>
> + vph_pwr: vph-pwr-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vph_pwr";
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> vreg_conn_1p8: vreg_conn_1p8 {
> compatible = "regulator-fixed";
> regulator-name = "vreg_conn_1p8";
> @@ -128,6 +135,30 @@ dp1_connector_in: endpoint {
> };
> };
> };
> +
> + dp-dsi0-connector {
> + compatible = "dp-connector";
> + label = "DSI0";
> + type = "full-size";
> +
> + port {
> + dp_dsi0_connector_in: endpoint {
> + remote-endpoint = <&dsi2dp_bridge0_out>;
> + };
> + };
> + };
> +
> + dp-dsi1-connector {
> + compatible = "dp-connector";
> + label = "DSI1";
> + type = "full-size";
> +
> + port {
> + dp_dsi1_connector_in: endpoint {
> + remote-endpoint = <&dsi2dp_bridge1_out>;
> + };
> + };
> + };
> };
>
> &apps_rsc {
> @@ -517,9 +548,135 @@ &i2c11 {
>
> &i2c18 {
> clock-frequency = <400000>;
> - pinctrl-0 = <&qup_i2c18_default>;
> + pinctrl-0 = <&qup_i2c18_default>,
> + <&io_expander_intr_active>,
> + <&io_expander_reset_active>;
These pinctrl entries should go to the IO expander itself.
> pinctrl-names = "default";
> +
> status = "okay";
> +
> + io_expander: gpio@74 {
> + compatible = "ti,tca9539";
> + reg = <0x74>;
> + interrupts-extended = <&tlmm 98 IRQ_TYPE_EDGE_BOTH>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> +
> + gpio2-hog {
This needs a huuge explanation in the commit message. Otherwise I'd say
these pins should likely be used by the corresponding anx bridges.
> + gpio-hog;
> + gpios = <2 GPIO_ACTIVE_HIGH>;
> + input;
> + line-name = "dsi0_int_pin";
> + };
> +
> + gpio3-hog {
> + gpio-hog;
> + gpios = <3 GPIO_ACTIVE_LOW>;
> + output-high;
> + line-name = "dsi0_cbl_det_pin";
> + };
> +
> + gpio10-hog {
> + gpio-hog;
> + gpios = <10 GPIO_ACTIVE_HIGH>;
> + input;
> + line-name = "dsi1_int_pin";
> + };
> +
> + gpio11-hog {
> + gpio-hog;
> + gpios = <11 GPIO_ACTIVE_LOW>;
> + output-high;
> + line-name = "dsi1_cbl_det_pin";
> + };
> + };
> +
> + i2c-mux@70 {
> + compatible = "nxp,pca9543";
> + #address-cells = <1>;
> +
> + #size-cells = <0>;
> + reg = <0x70>;
> +
> + i2c@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + bridge@58 {
> + compatible = "analogix,anx7625";
> + reg = <0x58>;
> + interrupts-extended = <&io_expander 2 IRQ_TYPE_EDGE_FALLING>;
> + enable-gpios = <&io_expander 1 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&io_expander 0 GPIO_ACTIVE_HIGH>;
> + vdd10-supply = <&vph_pwr>;
> + vdd18-supply = <&vph_pwr>;
> + vdd33-supply = <&vph_pwr>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + dsi2dp_bridge0_in: endpoint {
> + remote-endpoint = <&mdss0_dsi0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + dsi2dp_bridge0_out: endpoint {
> + remote-endpoint = <&dp_dsi0_connector_in>;
> + };
> + };
> + };
> + };
> + };
> +
> + i2c@1 {
> + reg = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + bridge@58 {
> + compatible = "analogix,anx7625";
> + reg = <0x58>;
> + interrupts-extended = <&io_expander 10 IRQ_TYPE_EDGE_FALLING>;
> + enable-gpios = <&io_expander 9 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&io_expander 8 GPIO_ACTIVE_HIGH>;
> + vdd10-supply = <&vph_pwr>;
> + vdd18-supply = <&vph_pwr>;
> + vdd33-supply = <&vph_pwr>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + dsi2dp_bridge1_in: endpoint {
> + remote-endpoint = <&mdss0_dsi1_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + dsi2dp_bridge1_out: endpoint {
> + remote-endpoint = <&dp_dsi1_connector_in>;
> + };
> + };
> + };
> + };
> + };
> + };
> +
> };
>
> &mdss0 {
> @@ -566,6 +723,40 @@ &mdss0_dp1_phy {
> status = "okay";
> };
>
> +&mdss0_dsi0 {
> + vdda-supply = <&vreg_l1c>;
> +
> + status = "okay";
> +};
> +
> +&mdss0_dsi0_out {
> + data-lanes = <0 1 2 3>;
> + remote-endpoint = <&dsi2dp_bridge0_in>;
> +};
> +
> +&mdss0_dsi0_phy {
> + vdds-supply = <&vreg_l4a>;
> +
> + status = "okay";
> +};
> +
> +&mdss0_dsi1 {
> + vdda-supply = <&vreg_l1c>;
> +
> + status = "okay";
> +};
> +
> +&mdss0_dsi1_out {
> + data-lanes = <0 1 2 3>;
> + remote-endpoint = <&dsi2dp_bridge1_in>;
> +};
> +
> +&mdss0_dsi1_phy {
> + vdds-supply = <&vreg_l4a>;
> +
> + status = "okay";
> +};
> +
> &pmm8654au_0_gpios {
> gpio-line-names = "DS_EN",
> "POFF_COMPLETE",
> @@ -714,6 +905,21 @@ ethernet0_mdio: ethernet0-mdio-pins {
> };
> };
>
> + io_expander_intr_active: io-expander-intr-active-state {
> + pins = "gpio98";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + io_expander_reset_active: io-expander-reset-active-state {
> + pins = "gpio97";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-disable;
> + output-high;
> + };
> +
> qup_uart10_default: qup-uart10-state {
> pins = "gpio46", "gpio47";
> function = "qup1_se3";
> --
> 2.34.1
>
--
With best wishes
Dmitry
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