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Message-ID: <74bb9d27-fd6f-4332-9965-e967c3a31c63@kernel.org>
Date: Mon, 7 Apr 2025 15:20:12 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Ze Huang <huangze@...t.edu.cn>, Vinod Koul <vkoul@...nel.org>,
 Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Yixun Lan <dlan@...too.org>,
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Philipp Zabel <p.zabel@...gutronix.de>,
 Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
 Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
 <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
 Alexandre Ghiti <alex@...ti.fr>
Cc: linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-riscv@...ts.infradead.org, spacemit@...ts.linux.dev,
 linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org
Subject: Re: [PATCH 2/7] dt-bindings: phy: spacemit: add K1 PCIe/USB3 combo
 PHY

On 07/04/2025 14:38, Ze Huang wrote:
> Introduce support for SpacemiT K1 PCIe/USB3 combo PHY controller.
> 
> PCIe portA and USB3 controller share this phy, only one of them can work
> at any given application scenario.
> 
> Signed-off-by: Ze Huang <huangze@...t.edu.cn>
> ---
>  .../bindings/phy/spacemit,k1-combphy.yaml          | 53 ++++++++++++++++++++++
>  1 file changed, 53 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..450157b65410b27129603ea1f3523776a1b0a75e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/spacemit,k1-combphy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Spacemit K1 PCIe/USB3 PHY
> +
> +maintainers:
> +  - Ze Huang <huangze@...t.edu.cn>
> +
> +description:
> +  Combo PHY on SpacemiT K1 SoC.PCIe port A and USB3 controller share this
> +  phy, only one of PCIe port A and USB3 port can work at any given application
> +  scenario.
> +
> +properties:
> +  compatible:
> +    const: spacemit,k1-combphy
> +
> +  reg:
> +    maxItems: 2

List and describe the items instead

> +
> +  reg-names:
> +    items:
> +      - const: phy_ctrl

drop phy_

> +      - const: phy_sel

ditto

> +
> +  resets:
> +    maxItems: 1
> +
> +  "#phy-cells":
> +    const: 1

What is the cell argument?

Also no supplies?

> 


Best regards,
Krzysztof

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