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Message-ID: <20250407145546.270683-16-herve.codina@bootlin.com>
Date: Mon, 7 Apr 2025 16:55:44 +0200
From: Herve Codina <herve.codina@...tlin.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Danilo Krummrich <dakr@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Andi Shyti <andi.shyti@...nel.org>,
Wolfram Sang <wsa+renesas@...g-engineering.com>,
Peter Rosin <peda@...ntia.se>,
Derek Kiernan <derek.kiernan@....com>,
Dragan Cvetic <dragan.cvetic@....com>,
Arnd Bergmann <arnd@...db.de>,
Herve Codina <herve.codina@...tlin.com>,
Rob Herring <robh@...nel.org>,
Saravana Kannan <saravanak@...gle.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Mark Brown <broonie@...nel.org>,
Len Brown <lenb@...nel.org>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Daniel Scally <djrscally@...il.com>,
Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
Sakari Ailus <sakari.ailus@...ux.intel.com>
Cc: Wolfram Sang <wsa@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
linux-kernel@...r.kernel.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org,
linux-i2c@...r.kernel.org,
devicetree@...r.kernel.org,
linux-pci@...r.kernel.org,
linux-spi@...r.kernel.org,
linux-acpi@...r.kernel.org,
Allan Nielsen <allan.nielsen@...rochip.com>,
Horatiu Vultur <horatiu.vultur@...rochip.com>,
Steen Hegelund <steen.hegelund@...rochip.com>,
Luca Ceresoli <luca.ceresoli@...tlin.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: [PATCH 15/16] misc: lan966x_pci: Add dtso nodes in order to support SFPs
Add device-tree nodes needed to support SFPs.
Those nodes are:
- the clock controller
- the i2c controller
- the i2c mux
- the SFPs themselves and their related ports in the switch
Signed-off-by: Herve Codina <herve.codina@...tlin.com>
---
drivers/misc/lan966x_pci.dtso | 111 ++++++++++++++++++++++++++++++++++
1 file changed, 111 insertions(+)
diff --git a/drivers/misc/lan966x_pci.dtso b/drivers/misc/lan966x_pci.dtso
index 94a967b384f3..a2015b46cd44 100644
--- a/drivers/misc/lan966x_pci.dtso
+++ b/drivers/misc/lan966x_pci.dtso
@@ -47,6 +47,47 @@ sys_clk: clock-15625000 {
clock-frequency = <15625000>; /* System clock = 15.625MHz */
};
+ i2c0_emux: i2c0-emux {
+ compatible = "i2c-mux-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-parent = <&i2c0>;
+ pinctrl-names = "i2c102", "i2c103", "idle";
+ pinctrl-0 = <&i2cmux_0>;
+ pinctrl-1 = <&i2cmux_1>;
+ pinctrl-2 = <&i2cmux_pins>;
+
+ i2c102: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c103: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ sfp2: sfp2 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c102>;
+ tx-disable-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ los-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+ tx-fault-gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ sfp3: sfp3 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c103>;
+ tx-disable-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+ los-gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+ tx-fault-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
+ };
+
pci-ep-bus@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -95,6 +136,50 @@ port1: port@1 {
phy-mode = "gmii";
phys = <&serdes 1 CU(1)>;
};
+
+ port2: port@2 {
+ reg = <2>;
+ phy-mode = "sgmii";
+ phys = <&serdes 2 SERDES6G(0)>;
+ sfp = <&sfp2>;
+ managed = "in-band-status";
+ };
+
+ port3: port@3 {
+ reg = <3>;
+ phy-mode = "sgmii";
+ phys = <&serdes 3 SERDES6G(1)>;
+ sfp = <&sfp3>;
+ managed = "in-band-status";
+ };
+ };
+ };
+
+ flx0: flexcom@...40000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xe0040000 0x100>;
+ clocks = <&clks GCK_ID_FLEXCOM0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe0040000 0x800>;
+
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
+
+ i2c0: i2c@600 {
+ compatible = "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupt-parent = <&oic>;
+ interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clks GCK_ID_FLEXCOM0>;
+ assigned-clocks = <&clks GCK_ID_FLEXCOM0>;
+ assigned-clock-rates = <20000000>;
+ pinctrl-0 = <&fc0_a_pins>;
+ pinctrl-names = "default";
+ i2c-analog-filter;
+ i2c-digital-filter;
+ i2c-digital-filter-width-ns = <35>;
};
};
@@ -103,6 +188,14 @@ cpu_ctrl: syscon@...c0000 {
reg = <0xe00c0000 0xa8>;
};
+ clks: clock-controller@...c00a8 {
+ compatible = "microchip,lan966x-gck";
+ #clock-cells = <1>;
+ clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
+ clock-names = "cpu", "ddr", "sys";
+ reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>;
+ };
+
oic: oic@...c0120 {
compatible = "microchip,lan966x-oic";
#interrupt-cells = <2>;
@@ -143,6 +236,24 @@ fc0_a_pins: fcb4-i2c-pins {
pins = "GPIO_9", "GPIO_10";
function = "fc0_a";
};
+
+ i2cmux_pins: i2cmux-pins {
+ pins = "GPIO_76", "GPIO_77";
+ function = "twi_slc_gate";
+ output-low;
+ };
+
+ i2cmux_0: i2cmux-0 {
+ pins = "GPIO_76";
+ function = "twi_slc_gate";
+ output-high;
+ };
+
+ i2cmux_1: i2cmux-1 {
+ pins = "GPIO_77";
+ function = "twi_slc_gate";
+ output-high;
+ };
};
mdio1: mdio@...0413c {
--
2.49.0
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