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Message-Id: <20250407-apple-cpmu-v6-16-ae8c2f225c1f@gmail.com>
Date: Mon, 07 Apr 2025 12:45:25 +0800
From: Nick Chan <towinchenmi@...il.com>
To: Will Deacon <will@...nel.org>, Mark Rutland <mark.rutland@....com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Catalin Marinas <catalin.marinas@....com>, Sven Peter <sven@...npeter.dev>,
Janne Grunau <j@...nau.net>, Alyssa Rosenzweig <alyssa@...enzweig.io>,
Neal Gompa <neal@...pa.dev>
Cc: Marc Zyngier <maz@...nel.org>, linux-arm-kernel@...ts.infradead.org,
linux-perf-users@...r.kernel.org, devicetree@...r.kernel.org,
asahi@...ts.linux.dev, linux-kernel@...r.kernel.org,
Nick Chan <towinchenmi@...il.com>
Subject: [PATCH v6 16/21] arm64: dts: apple: s800-0-3: Add CPU PMU nodes
Add CPU PMU nodes for Apple A9 SoC.
Signed-off-by: Nick Chan <towinchenmi@...il.com>
---
arch/arm64/boot/dts/apple/s800-0-3.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/apple/s800-0-3.dtsi b/arch/arm64/boot/dts/apple/s800-0-3.dtsi
index c0e9ae45627c8150bc0ddcdc1e6ab65d52fa7219..56ac6e7f3803a16beacc74764262b02c75a96fce 100644
--- a/arch/arm64/boot/dts/apple/s800-0-3.dtsi
+++ b/arch/arm64/boot/dts/apple/s800-0-3.dtsi
@@ -167,6 +167,14 @@ timer {
interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
+
+ pmu {
+ compatible = "apple,twister-pmu";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 76 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 79 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0 &cpu1>;
+ };
};
#include "s800-0-3-pmgr.dtsi"
--
2.49.0
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