linux-kernel - [PATCH v4 2/2] riscv: sophgo: dts: Add spi controller for SG2042

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Message-Id: <20250407-sfg-spi-v4-2-30ac949a1e35@gmail.com>
Date: Mon, 07 Apr 2025 14:35:13 +0800
From: Zixian Zeng <sycamoremoon376@...il.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Paul Walmsley <paul.walmsley@...ive.com>, 
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, 
 Chen Wang <unicorn_wang@...look.com>, Inochi Amaoto <inochiama@...look.com>, 
 Alexandre Ghiti <alex@...ti.fr>, Mark Brown <broonie@...nel.org>, 
 Inochi Amaoto <inochiama@...il.com>
Cc: devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org, 
 linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org, 
 sophgo@...ts.linux.dev, chao.wei@...hgo.com, xiaoguang.xing@...hgo.com, 
 dlan@...too.org, Zixian Zeng <sycamoremoon376@...il.com>
Subject: [PATCH v4 2/2] riscv: sophgo: dts: Add spi controller for SG2042

Add spi controllers for SG2042.

SG2042 uses the upstreamed Synopsys DW SPI IP.

Signed-off-by: Zixian Zeng <sycamoremoon376@...il.com>
---
 arch/riscv/boot/dts/sophgo/sg2042.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index aa8b7fcc125d71eec12b09493964d90f5dfed27c..ddde4c613c4734db191de500b016b322a9602efc 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -537,6 +537,32 @@ uart0: serial@...0000000 {
 			status = "disabled";
 		};
 
+		spi0: spi@...0004000 {
+			compatible = "sophgo,sg2042-spi", "snps,dw-apb-ssi";
+			reg = <0x70 0x40004000 0x00 0x1000>;
+			clocks = <&clkgen GATE_CLK_APB_SPI>;
+			interrupt-parent = <&intc>;
+			interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			num-cs = <2>;
+			resets = <&rstgen RST_SPI0>;
+			status = "disabled";
+		};
+
+		spi1: spi@...0005000 {
+			compatible = "sophgo,sg2042-spi", "snps,dw-apb-ssi";
+			reg = <0x70 0x40005000 0x00 0x1000>;
+			clocks = <&clkgen GATE_CLK_APB_SPI>;
+			interrupt-parent = <&intc>;
+			interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			num-cs = <2>;
+			resets = <&rstgen RST_SPI1>;
+			status = "disabled";
+		};
+
 		emmc: mmc@...002a000 {
 			compatible = "sophgo,sg2042-dwcmshc";
 			reg = <0x70 0x4002a000 0x0 0x1000>;

-- 
2.49.0