linux-kernel - Re: [PATCH V2 2/4] dt-bindings: imx6q-pcie: Add wake-gpios property

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <Z_N9cO64FZwONcK9@gaggiata.pivistrello.it>
Date: Mon, 7 Apr 2025 09:23:28 +0200
From: Francesco Dolcini <francesco@...cini.it>
To: Sherry Sun <sherry.sun@....com>
Cc: Francesco Dolcini <francesco@...cini.it>,
	Hongxing Zhu <hongxing.zhu@....com>,
	"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
	"lpieralisi@...nel.org" <lpieralisi@...nel.org>,
	"kw@...ux.com" <kw@...ux.com>, "robh@...nel.org" <robh@...nel.org>,
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
	"krzysztof.kozlowski+dt@...aro.org" <krzysztof.kozlowski+dt@...aro.org>,
	"conor+dt@...nel.org" <conor+dt@...nel.org>,
	"shawnguo@...nel.org" <shawnguo@...nel.org>,
	"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
	"kernel@...gutronix.de" <kernel@...gutronix.de>,
	"festevam@...il.com" <festevam@...il.com>,
	dl-linux-imx <linux-imx@....com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2 2/4] dt-bindings: imx6q-pcie: Add wake-gpios property

On Mon, Apr 07, 2025 at 07:18:32AM +0000, Sherry Sun wrote:
> 
> 
> > -----Original Message-----
> > From: Francesco Dolcini <francesco@...cini.it>
> > Sent: Friday, April 4, 2025 5:42 PM
> > To: Sherry Sun <sherry.sun@....com>
> > Cc: Hongxing Zhu <hongxing.zhu@....com>; l.stach@...gutronix.de;
> > lpieralisi@...nel.org; kw@...ux.com; robh@...nel.org;
> > bhelgaas@...gle.com; krzysztof.kozlowski+dt@...aro.org;
> > conor+dt@...nel.org; shawnguo@...nel.org; s.hauer@...gutronix.de;
> > kernel@...gutronix.de; festevam@...il.com; dl-linux-imx <linux-
> > imx@....com>; linux-pci@...r.kernel.org; linux-arm-
> > kernel@...ts.infradead.org; devicetree@...r.kernel.org; linux-
> > kernel@...r.kernel.org
> > Subject: Re: [PATCH V2 2/4] dt-bindings: imx6q-pcie: Add wake-gpios property
> > 
> > Hello
> > 
> > On Wed, Dec 13, 2023 at 05:28:48PM +0800, Sherry Sun wrote:
> > > Add wake-gpios property that can be used to wakeup the host processor.
> > >
> > > Signed-off-by: Sherry Sun <sherry.sun@....com>
> > > Reviewed-by: Richard Zhu <hongxing.zhu@....com>
> > > ---
> > >  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
> > >  1 file changed, 6 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > index 81bbb8728f0f..fba757d937e1 100644
> > > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > @@ -72,6 +72,12 @@ properties:
> > >        L=operation state) (optional required).
> > >      type: boolean
> > >
> > > +  wake-gpios:
> > > +    description: If present this property specifies WAKE# sideband signaling
> > > +      to implement wakeup functionality. This is an input GPIO pin for the
> > Root
> > > +      Port mode here. Host drivers will wakeup the host using the IRQ
> > > +      corresponding to the passed GPIO.
> > > +
> > 
> > From what I know it is possible to share the same WAKE# signal for multiple
> > root ports. Is this going to work fine with this binding? Same question on the
> > driver.
> > 
> > We do have design exactly like that, so it's not a theoretical question.
> > 
> The current design doesn't support such case, maybe some changes in the
> driver could achieve that (mark the wake-gpio as GPIOD_FLAGS_BIT_NONEXCLUSIVE
> and the interrupt as IRQF_SHARED, etc.).

Can you consider implementing this?

> But usually each RC has its own WAKE# pin assigned. We have not come across a
> case where multiple RC share the same WAKE# pin.

We do have such design, with an NXP iMX95 SoC, available now.

Francesco