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Message-ID: <jh2kntthtj5dz4dmltc63ye3v4owsl5evcnzpf5anrzdzqzms6@hng6ciwzry3t>
Date: Mon, 7 Apr 2025 13:06:45 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>, Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>, Jingoo Han <jingoohan1@...il.com>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v2 1/3] PCI: Add sysfs support for exposing PTM context
On Mon, Mar 24, 2025 at 03:01:49PM +0200, Ilpo Järvinen wrote:
> On Mon, 24 Mar 2025, Manivannan Sadhasivam via B4 Relay wrote:
>
> > From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> >
> > Precision Time Management (PTM) mechanism defined in PCIe spec r6.0,
> > sec 6.22 allows precise coordination of timing information across multiple
> > components in a PCIe hierarchy with independent local time clocks.
>
> Hi Mani,
>
> PCIe r6.0.1 sec 6.22 is about Readiness Notification (RN) and PTM is 6.21,
> did you perhaps mistype the section number?
>
Oops, yeah. I referred the PCIe 5.0 spec, but mistakenly quoted 6.0. Will fix
it.
> > PCI core already supports enabling PTM in the root port and endpoint
> > devices through PTM Extended Capability registers. But the PTM context
> > supported by the PTM capable components such as Root Complex (RC) and
> > Endpoint (EP) controllers were not exposed as of now.
> >
> > Hence, add the sysfs support to expose the PTM context to userspace from
> > both PCIe RC and EP controllers. Controller drivers are expected to call
> > pcie_ptm_create_sysfs() to create the sysfs attributes for the PTM context
> > and call pcie_ptm_destroy_sysfs() to destroy them. The drivers should also
> > populate the relevant callbacks in the 'struct pcie_ptm_ops' structure
> > based on the controller implementation.
> >
> > Below PTM context are exposed through sysfs:
> >
> > PCIe RC
> > =======
> >
> > 1. PTM Local clock
> > 2. PTM T2 timestamp
> > 3. PTM T3 timestamp
> > 4. PTM Context valid
> >
> > PCIe EP
> > =======
> >
> > 1. PTM Local clock
> > 2. PTM T1 timestamp
> > 3. PTM T4 timestamp
> > 4. PTM Master clock
> > 5. PTM Context update
> >
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > ---
> > Documentation/ABI/testing/sysfs-platform-pcie-ptm | 70 ++++++
> > MAINTAINERS | 1 +
> > drivers/pci/pcie/ptm.c | 268 ++++++++++++++++++++++
> > include/linux/pci.h | 35 +++
> > 4 files changed, 374 insertions(+)
> >
> > diff --git a/Documentation/ABI/testing/sysfs-platform-pcie-ptm b/Documentation/ABI/testing/sysfs-platform-pcie-ptm
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..010c3e32e2b8eaf352a8e1aad7420d8a3e948dae
> > --- /dev/null
> > +++ b/Documentation/ABI/testing/sysfs-platform-pcie-ptm
> > @@ -0,0 +1,70 @@
> > +What: /sys/devices/platform/*/ptm/local_clock
> > +Date: February 2025
> > +Contact: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > +Description:
> > + (RO) PTM local clock in nanoseconds. Applicable for both Root
> > + Complex and Endpoint controllers.
> > +
> > +What: /sys/devices/platform/*/ptm/master_clock
> > +Date: February 2025
> > +Contact: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > +Description:
> > + (RO) PTM master clock in nanoseconds. Applicable only for
> > + Endpoint controllers.
> > +
> > +What: /sys/devices/platform/*/ptm/t1
> > +Date: February 2025
> > +Contact: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > +Description:
> > + (RO) PTM T1 timestamp in nanoseconds. Applicable only for
> > + Endpoint controllers.
> > +
> > +What: /sys/devices/platform/*/ptm/t2
> > +Date: February 2025
> > +Contact: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > +Description:
> > + (RO) PTM T2 timestamp in nanoseconds. Applicable only for
> > + Root Complex controllers.
> > +
> > +What: /sys/devices/platform/*/ptm/t3
> > +Date: February 2025
> > +Contact: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > +Description:
> > + (RO) PTM T3 timestamp in nanoseconds. Applicable only for
> > + Root Complex controllers.
> > +
> > +What: /sys/devices/platform/*/ptm/t4
> > +Date: February 2025
> > +Contact: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > +Description:
> > + (RO) PTM T4 timestamp in nanoseconds. Applicable only for
> > + Endpoint controllers.
> > +
> > +What: /sys/devices/platform/*/ptm/context_update
> > +Date: February 2025
> > +Contact: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > +Description:
> > + (RW) Control the PTM context update mode. Applicable only for
> > + Endpoint controllers.
> > +
> > + Following values are supported:
> > +
> > + * auto = PTM context auto update trigger for every 10ms
> > +
> > + * manual = PTM context manual update. Writing 'manual' to this
> > + file triggers PTM context update (default)
> > +
> > +What: /sys/devices/platform/*/ptm/context_valid
> > +Date: February 2025
> > +Contact: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > +Description:
> > + (RW) Control the PTM context validity (local clock timing).
> > + Applicable only for Root Complex controllers. PTM context is
> > + invalidated by hardware if the Root Complex enters low power
> > + mode or changes link frequency.
> > +
> > + Following values are supported:
> > +
> > + * 0 = PTM context invalid (default)
> > +
> > + * 1 = PTM context valid
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index b4d09d52a750b320f689c1365791cdfa6e719fde..f1bac092877df739328347481bd14f6701a7df19 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -18213,6 +18213,7 @@ Q: https://patchwork.kernel.org/project/linux-pci/list/
> > B: https://bugzilla.kernel.org
> > C: irc://irc.oftc.net/linux-pci
> > T: git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git
> > +F: Documentation/ABI/testing/sysfs-platform-pcie-ptm
> > F: Documentation/devicetree/bindings/pci/
> > F: drivers/pci/controller/
> > F: drivers/pci/pci-bridge-emul.c
> > diff --git a/drivers/pci/pcie/ptm.c b/drivers/pci/pcie/ptm.c
> > index 7cfb6c0d5dcb6de2a759b56d6877c95102b3d10f..bfa632b76a87ad304e966a8edfb5dba14d58a23c 100644
> > --- a/drivers/pci/pcie/ptm.c
> > +++ b/drivers/pci/pcie/ptm.c
> > @@ -10,6 +10,8 @@
> > #include <linux/pci.h>
> > #include "../pci.h"
> >
> > +struct device *ptm_device;
> > +
> > /*
> > * If the next upstream device supports PTM, return it; otherwise return
> > * NULL. PTM Messages are local, so both link partners must support it.
> > @@ -252,3 +254,269 @@ bool pcie_ptm_enabled(struct pci_dev *dev)
> > return dev->ptm_enabled;
> > }
> > EXPORT_SYMBOL(pcie_ptm_enabled);
> > +
> > +static ssize_t context_update_store(struct device *dev,
> > + struct device_attribute *attr,
> > + const char *buf, size_t count)
> > +{
> > + struct pcie_ptm *ptm = dev_get_drvdata(dev);
> > + int ret;
> > +
> > + if (!ptm->ops->context_update_store)
> > + return -EOPNOTSUPP;
> > +
> > + ret = ptm->ops->context_update_store(ptm->pdata, buf);
>
> Do these store funcs need some locking? Who is responsible about it?
>
Good catch! I obviously missed the locking here.
> Why isn't buf parsed here and converted to some define/enum values, what
> is the advantage of passing it on as char *?
>
Only because I was not sure if the values are going to be the same across all
implementations. But since I document 'auto' and 'manual' in ABI documentation,
I think it makes sense to pass the values directly.
- Mani
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