linux-kernel - Re: [PATCH v1 0/2] TH1520 SoC: Add Reset Controller Support

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Message-ID: <4400a2a695099e4d806d12ddda41c2533bf844c8.camel@pengutronix.de>
Date: Mon, 07 Apr 2025 12:27:24 +0200
From: Philipp Zabel <p.zabel@...gutronix.de>
To: Michal Wilczynski <m.wilczynski@...sung.com>, robh@...nel.org, 
	krzk+dt@...nel.org, conor+dt@...nel.org, drew@...7.com, guoren@...nel.org, 
	wefu@...hat.com, m.szyprowski@...sung.com
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 0/2] TH1520 SoC: Add Reset Controller Support

On Mi, 2025-03-05 at 09:23 +0100, Michal Wilczynski wrote:
> 
> On 3/3/25 16:25, Michal Wilczynski wrote:
> > This patch series adds reset controller support for the T-Head TH1520 SoC,
> > which is used in boards like the LicheePi 4A. While part of a broader effort to
> > enable the Imagination BXM-4-64 GPU upstream, these patches focus on providing
> > a dedicated reset controller driver and the corresponding Device Tree
> > nodes/bindings.
> > 
> > Bigger series cover letter:
> > https://lore.kernel.org/all/20250219140239.1378758-1-m.wilczynski@samsung.com/
> 
> 
> This series should be versioned as v6, to maintain continuity with the
> bigger patchset it is a subseries of. Please find below a changelog for
> the reset sub-series:
> 
> v6:
>  - split the reset part into sub-series, add the Reviewed-by from
>    Philipp

FTR, I'll apply this as v6. I've checked differences to v5 semi-
manually - the changes are not listed in the changelog, but they are
what I suggested:

----------8<----------
$ b4 am -T 20250219140239.1378758-1-m.wilczynski@...sung.com
$ b4 am -T 20250303152511.494405-1-m.wilczynski@...sung.com
$ b4 diff -m v5_20250219_m_wilczynski_enable_drm_imagination_bxm_4_64_support_for_licheepi_4a.mbx \
             20250303_m_wilczynski_th1520_soc_add_reset_controller_support.mbx

 1:  0394b6a226519 <  -:  ------------- dt-bindings: clock: thead: Add TH1520 VO clock controller
 2:  bd073ef5d8100 <  -:  ------------- clk: thead: Add clock support for VO subsystem in T-Head TH1520 SoC
 3:  bbfd6b84574eb <  -:  ------------- dt-bindings: firmware: thead,th1520: Add support for firmware node
 4:  9fa4a7c315420 <  -:  ------------- firmware: thead: Add AON firmware protocol driver
 5:  5775fe10945af <  -:  ------------- dt-bindings: power: Add TH1520 SoC power domains
 6:  501c3260c8060 <  -:  ------------- pmdomain: thead: Add power-domain driver for TH1520
 7:  67191981e2bd2 <  -:  ------------- riscv: Enable PM_GENERIC_DOMAINS for T-Head SoCs
 8:  e866e1039b1f1 <  -:  ------------- clk: thead: Add support for custom ops in CCU_GATE_CLK_OPS macro
 9:  73b7c8a74dfc6 <  -:  ------------- dt-bindings: clock: thead: Add GPU clkgen reset property
10:  116940381d1a3 <  -:  ------------- clk: thead: Add GPU clock gate control with CLKGEN reset support
11:  6ed636028a35c =  1:  cc4aca290ed6a dt-bindings: reset: Add T-HEAD TH1520 SoC Reset Controller
12:  49eee8a9fa0b1 !  2:  34edd507ac54b reset: thead: Add TH1520 reset controller driver
    @@ Commit message
         implements support for GPU reset control, with infrastructure in place
         to extend support for NPU and Watchdog Timer resets in future updates.
     
    +    Reviewed-by: Philipp Zabel <p.zabel@...gutronix.de>
         Signed-off-by: Michal Wilczynski <m.wilczynski@...sung.com>
     
      ## MAINTAINERS ##
    @@ drivers/reset/reset-th1520.c (new)
     +	struct th1520_reset_priv *priv = to_th1520_reset(rcdev);
     +	const struct th1520_reset_map *reset;
     +
    -+	if (id >= ARRAY_SIZE(th1520_resets))
    -+		return -EINVAL;
    -+
     +	reset = &th1520_resets[id];
     +
     +	return regmap_update_bits(priv->map, reset->reg, reset->bit, 0);
    @@ drivers/reset/reset-th1520.c (new)
     +	struct th1520_reset_priv *priv = to_th1520_reset(rcdev);
     +	const struct th1520_reset_map *reset;
     +
    -+	if (id >= ARRAY_SIZE(th1520_resets))
    -+		return -EINVAL;
    -+
     +	reset = &th1520_resets[id];
     +
     +	return regmap_update_bits(priv->map, reset->reg, reset->bit,
    @@ drivers/reset/reset-th1520.c (new)
     +		return ret;
     +
     +	priv->rcdev.owner = THIS_MODULE;
    -+	priv->rcdev.nr_resets = 2;
    ++	priv->rcdev.nr_resets = ARRAY_SIZE(th1520_resets);
     +	priv->rcdev.ops = &th1520_reset_ops;
     +	priv->rcdev.of_node = dev->of_node;
     +
13:  5b3a5c4e99c6e <  -:  ------------- drm/imagination: Add reset controller support for GPU initialization
14:  8175d1ae71f27 <  -:  ------------- dt-bindings: gpu: Add 'resets' property for GPU initialization
15:  37258df02d9f5 <  -:  ------------- dt-bindings: gpu: Add support for T-HEAD TH1520 GPU
16:  0da2bcc589f4e <  -:  ------------- drm/imagination: Add support for IMG BXM-4-64 GPU
17:  4a130662031ab <  -:  ------------- drm/imagination: Enable PowerVR driver for RISC-V
18:  96435f063bc3f <  -:  ------------- riscv: dts: thead: Add device tree VO clock controller
19:  d8734c51119f5 <  -:  ------------- riscv: dts: thead: Introduce power domain nodes with aon firmware
20:  bbd2819cbd342 <  -:  ------------- riscv: dts: thead: Introduce reset controller node
21:  b22cf01230932 <  -:  ------------- riscv: dts: thead: Add GPU node to TH1520 device tree
---------->8----------

regards
Philipp