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Message-ID: <Z/U6nVugAnrE2I7e@lpieralisi>
Date: Tue, 8 Apr 2025 17:02:53 +0200
From: Lorenzo Pieralisi <lpieralisi@...nel.org>
To: Mark Rutland <mark.rutland@....com>
Cc: Marc Zyngier <maz@...nel.org>, Thomas Gleixner <tglx@...utronix.de>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>,
	Sascha Bischoff <sascha.bischoff@....com>,
	Timothy Hayes <timothy.hayes@....com>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: Re: [PATCH 16/24] arm64: cpucaps: Add GCIE capability

On Tue, Apr 08, 2025 at 12:26:11PM +0100, Mark Rutland wrote:
> On Tue, Apr 08, 2025 at 12:50:15PM +0200, Lorenzo Pieralisi wrote:
> > Implement the GCIE capability as a strict boot cpu capability to
> > detect whether architectural GICv5 support is available in HW.
> > 
> > Signed-off-by: Lorenzo Pieralisi <lpieralisi@...nel.org>
> > Cc: Will Deacon <will@...nel.org>
> > Cc: Catalin Marinas <catalin.marinas@....com>
> > Cc: Marc Zyngier <maz@...nel.org>
> 
> This looks good; I have a minor consistency/bikeshedding concern below.
> 
> > ---
> >  arch/arm64/kernel/cpufeature.c | 7 +++++++
> >  arch/arm64/tools/cpucaps       | 1 +
> >  2 files changed, 8 insertions(+)
> > 
> > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> > index 9c4d6d552b25cb3a31d1fb267bd73d3f82513e69..8c60591633f3d435ad9b80a10e484f26af328964 100644
> > --- a/arch/arm64/kernel/cpufeature.c
> > +++ b/arch/arm64/kernel/cpufeature.c
> > @@ -3041,6 +3041,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> >  		.matches = has_pmuv3,
> >  	},
> >  #endif
> > +	{
> > +		.desc = "GCIE",
> > +		.type = ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE,
> > +		.capability = ARM64_HAS_GCIE,
> > +		.matches = has_cpuid_feature,
> > +		ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, GCIE, IMP)
> > +	},
> 
> I reckon it's worth making the desc a bit clearer, e.g. "GICv5 CPU
> interface".
> 
> It might be worth cleaning up the existing ARM64_HAS_GIC_CPUIF_SYSREGS
> feature, e.g. making that have "GICv3 CPU interface" as its desc.
> 
> Likewise, could make the names consistent, e.g. have:
> 
> 	ARM64_HAS_GICV3_CPUIF
> 	ARM64_HAS_GICV5_CPUIF
> 
> ... ?

This makes sense to me, I will do it in preparation for v2.

Thanks,
Lorenzo

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